-
Notifications
You must be signed in to change notification settings - Fork 559
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
02-Edge-AI-ZCU104 Vitis Platform Creation Tutorial: Can not run multiple dpu task (multi-thread) in this build. #101
Comments
@aclich This may be better suited for the folks in the Vitis AI tutorials: Can you ask there? |
One difference between base platform and VAI pre-built image is that Vitis-AI image optimizes AXI throughput with QoS settings. It's documented in Vitis-AI dpu-trd doc. It may impact Vitis-AI application performance but it should not cause crash. The crash may debug needs more knowledge from VART or Vitis-AI application level. Please try to get more help from Xilinx Forums or opening issues in Vitis-AI, Vitis-AI-Tutorials. |
@Premduth @imrickysu Thanks for the reply and advise on this issue. I will ask about this on there. Many thanks! |
Update *note: After copying the driver patch into petalinux project will have error during the kernel config, how I solve it is to |
That's great, @aclich. Thanks for sharing the solution. |
* Updated targets for Spirite testing * Updated targets for Sprite * added host, xclbin, and emconfig targets * updated with new options * updated with latest options * Added default STEP * updated path to OpenCV * added tasks {} to enable setup of OpenCV environment * backed out taks{} * added task{} to setup OpenCV environment * added --platform to KRNL_COMPILE_OPTS * copied name to description removed blacklist platform * restored missing files * copied name to description removed blacklist * copied name to description removed blacklist * copied name to description removed blacklist * copied description to name removed blacklist * copied name to decription removed blacklist * copied name to description removed blacklist * copied name to description added U50 to whitelist removed blacklist * copied name to description removed blacklist * copied name to description removed blacklist * copied name to description removed blacklist * copied name to description removed blacklist * copied name to description removed blacklist * copied name to description removed blacklist * copied description to name removed blacklist * added host, xclbin, emconfig build targets * added host, xclbin, and emconfig as make targets * added host, xclbin, emconfig as make targets * added host, xclbin, emconfig as make targets * removed PREBUILT updated hardware build instructions * disabled PREBUILT * Update lab3_build_app_kernel.md * Create user.xml * added user-xml for user-managed * changed HOST=user to default * commented ip2 and ip3 * changed memory bank to 1 * added multi_params.json * Create multi_params.json * added multi_params.json * added multi_params.json * Added for Sprite Enable * added --platform to xo and xclbin * Update README.md * update to 2021.2 * update for 2021.2 * update for 2021.2 * update for 2021.2 * Update synth_and_analysis.md * Update synth_and_analysis.md * added Pipeline II error * Add files via upload
Updated traffic gen tutorial
* Updated targets for Spirite testing * Updated targets for Sprite * added host, xclbin, and emconfig targets * updated with new options * updated with latest options * Added default STEP * updated path to OpenCV * added tasks {} to enable setup of OpenCV environment * backed out taks{} * added task{} to setup OpenCV environment * added --platform to KRNL_COMPILE_OPTS * copied name to description removed blacklist platform * restored missing files * copied name to description removed blacklist * copied name to description removed blacklist * copied name to description removed blacklist * copied description to name removed blacklist * copied name to decription removed blacklist * copied name to description removed blacklist * copied name to description added U50 to whitelist removed blacklist * copied name to description removed blacklist * copied name to description removed blacklist * copied name to description removed blacklist * copied name to description removed blacklist * copied name to description removed blacklist * copied name to description removed blacklist * copied description to name removed blacklist * added host, xclbin, emconfig build targets * added host, xclbin, and emconfig as make targets * added host, xclbin, emconfig as make targets * added host, xclbin, emconfig as make targets * removed PREBUILT updated hardware build instructions * disabled PREBUILT * Update lab3_build_app_kernel.md * Create user.xml * added user-xml for user-managed * changed HOST=user to default * commented ip2 and ip3 * changed memory bank to 1 * added multi_params.json * Create multi_params.json * added multi_params.json * added multi_params.json * Added for Sprite Enable * added --platform to xo and xclbin * Update README.md * update to 2021.2 * update for 2021.2 * update for 2021.2 * update for 2021.2 * Update synth_and_analysis.md * Update synth_and_analysis.md * added Pipeline II error * Add files via upload
cf8aead Add Keccak-256 API (Xilinx#101) a7acfcc add system compiler cases (Xilinx#94) 7efc6e5 add VDF in top readme (Xilinx#100) 37500bc fix xchacha20's description.json and run_hls.tcl (Xilinx#98) b089777 Merge pull request Xilinx#97 from yuanqian/increase_mem 5dd56c9 increase memory 5a60bb2 Merge remote-tracking branch 'upstream/next' into next sync 95d5536 Fix cr 1107646 4 (Xilinx#96) f1f8a14 use local golden instead of calling openssl (Xilinx#95) 8ec8b62 use local golden instead of openssl (Xilinx#93) f730906 Fix cr 1107646 (Xilinx#92) 99b56d5 replace XILINX_VIVADO with XILINX_HLS in Makefile to fix issue-227 (Xilinx#91) 8bec97c change 2021.1_stable_latest to 2021.2_stable_latest 5ea5c76 update Makefile REVERT: 247b394 create master branch from next branch git-subtree-dir: security git-subtree-split: cf8aeadb2adfebd01de4fc8f59d9405ce7691182 Co-authored-by: sdausr <[email protected]>
37cba5b Clean WebpEnc 05b7e30 fixed index.html d3e13e2 modified 2021.1 to 2021.2 5d21faf Merge pull request Xilinx#107 from yunleiz/fnext 2f4abaa [gui] add description 0183ab5 Merge pull request Xilinx#106 from yunleiz/fnext 672b1db [clean]fixed CR https://jira.xilinx.com/browse/CR-1109840 010b477 fixed CR https://jira.xilinx.com/browse/CR-1109840 a64fbce Merge pull request Xilinx#103 from yuxiangz/move 480ec86 rm L2include 8d4685b Merge pull request Xilinx#102 from siyangw/next 383fda2 fix some problem for https://jira.xilinx.com/browse/CR-1107161 de542c3 Merge pull request Xilinx#101 from yuxiangz/rmwebp 0b648f2 rm webp 5ff5869 Merge pull request Xilinx#100 from liyuanz/next 4fa8680 replace XILINX_VIVADO with XILINX_HLS ffcb650 Merge pull request Xilinx#98 from yuxiangz/image_error e95ae01 fixed image error 891a16e Merge pull request Xilinx#97 from yuxiangz/readme b0c676e fixed benchmark c04bc74 update release 1b28512 fixed kernel doc c853e54 update benchmark wepb 573f3db revise code struct 451450e add wepb api 7d4d309 Merge pull request Xilinx#95 from yuxiangz/readme b2e9ddd fixed error for readme 9f32eb2 Merge pull request Xilinx#94 from yuxiangz/readme 8974955 fixed error for readme ca242c9 Merge pull request Xilinx#91 from yunleiz/fnext 53b7203 [doc] fixed pik profm in next b53c54c [doc] fixed pik profm in net 4152274 Merge pull request Xilinx#90 from yunleiz/fnext f4a9082 [doc] fixed readme on next a1b4baa Merge pull request Xilinx#88 from siyangw/fix_sw_emu 4bbba7f change 2021.1_stable_latest to 2021.2_stable_latest REVERT: 48cc941 Merge pull request Xilinx#99 from yuxiangz/cr-640 REVERT: c373206 fixed image error for master REVERT: 4d5db06 Merge pull request Xilinx#92 from yunleiz/fmaster REVERT: 19e4a69 [doc] fixed pik profm in master REVERT: 74e5c6a Merge pull request Xilinx#89 from yunleiz/fmaster REVERT: 2f9cc50 [doc] fixed readme on master REVERT: 587473b Merge pull request Xilinx#87 from siyangw/fix_sw_emu REVERT: 41a249c create master branch from next branch git-subtree-dir: codec git-subtree-split: 37cba5bec8072c63d0d75433cebe2467cd74f401 Co-authored-by: sdausr <[email protected]>
f7d1abc Merge pull request Xilinx#122 from tuol/disable_2_case ae62691 disable 2 case due to U250 platform change 3af143e Merge pull request Xilinx#118 from tuol/fix_cr_1122542 3e7f919 temporally disable L3/tests/mlp, due to U250 platform change 1728d13 update opts.cfg 98d3f3f Merge pull request Xilinx#117 from yuanqian/next 8639708 remove email from Jenkinsfile:https://jira.xilinx.com/browse/CR-1124831 18a7458 Merge pull request Xilinx#116 from changg/wa_u280_201920 86e28ef WA for xilinx_u280_xdma_201920_3 07abe54 Merge pull request Xilinx#114 from liyuanz/replace_cflags 7cb157c replace cflags with clflags 0196ded Merge pull request Xilinx#113 from changg/cov_fix fc100b4 cov fix b201f43 cov fix 14067e6 Merge pull request Xilinx#110 from liyuanz/next bbe42e9 fix bug 257677d Merge pull request Xilinx#109 from changg/pr_108 79db50c fix makefiles 984a71c update Makefile and utils daf9820 Merge pull request Xilinx#106 from liyuanz/replace_blacklist 28fe2ed replace whiltelist/blacklist to allowlist/blocklist 981b5a2 Merge pull request Xilinx#105 from changg/pr_104 2f45a63 add time for hw_build a21b8db add time 7256e35 add time 5f2c36a Merge pull request Xilinx#102 from changg/add_extraflags acce305 fix utils.mk 74536af fix utils.mk 3c0647e Merge pull request Xilinx#101 from liyuanz/next fc26744 increase mem 7a1b220 Merge pull request Xilinx#99 from changg/fix_mks 055c521 fix typ 44ff7b9 fix utils.mk 4050d17 Merge pull request Xilinx#98 from liyuanz/replace_targets b0157d6 update targes e41fc60 Merge pull request Xilinx#96 from changg/metadata f6d1e26 draft metadata 0bbb982 change 2021.2_stable_latest to 2022.1_stable_latest Co-authored-by: sdausr <[email protected]>
00c1121 Merge pull request Xilinx#101 from changg/wa_u280 6353429 fix 15dddbb Merge pull request Xilinx#100 from changg/wa_u280 bb26130 wa for u280 f33813e Merge pull request Xilinx#99 from changg/fix_meta 78bfba6 fix meta Co-authored-by: sdausr <[email protected]>
I was following https://github.com/Xilinx/Vitis-Tutorials/tree/master/Vitis_Platform_Creation/Introduction/02-Edge-AI-ZCU104 this platform creation tutorial and refer to this issue #87 to solve some problem in the flow and build the project successfully. However, I was trying some examples from vitis-ai-library and VART, the system will crash without any information while running the program with multiple dpu task or threads. But the program with only one dpu task or thread can run without problem.
I've tried version 2020.2(Vitis-ai 1.3) and 2021.1(vitis-ai 1.4) in this tutorial and both of them have same problem. But the Vitis-ai official image from here won't have this problem.
Is there anything need to setup for running multiple dpu task or I missed some thing? Because the system will not print out any error code or info during the crash, it's hard to know which part is going wrong and giving a screenshot. Sorry for the inconvenience.
The text was updated successfully, but these errors were encountered: