Commit
This commit does not belong to any branch on this repository, and may belong to a fork outside of the repository.
Squashed 'hpc' changes from 1992a84..f7d1abc (#546)
f7d1abc Merge pull request Xilinx#122 from tuol/disable_2_case ae62691 disable 2 case due to U250 platform change 3af143e Merge pull request Xilinx#118 from tuol/fix_cr_1122542 3e7f919 temporally disable L3/tests/mlp, due to U250 platform change 1728d13 update opts.cfg 98d3f3f Merge pull request Xilinx#117 from yuanqian/next 8639708 remove email from Jenkinsfile:https://jira.xilinx.com/browse/CR-1124831 18a7458 Merge pull request Xilinx#116 from changg/wa_u280_201920 86e28ef WA for xilinx_u280_xdma_201920_3 07abe54 Merge pull request Xilinx#114 from liyuanz/replace_cflags 7cb157c replace cflags with clflags 0196ded Merge pull request Xilinx#113 from changg/cov_fix fc100b4 cov fix b201f43 cov fix 14067e6 Merge pull request Xilinx#110 from liyuanz/next bbe42e9 fix bug 257677d Merge pull request Xilinx#109 from changg/pr_108 79db50c fix makefiles 984a71c update Makefile and utils daf9820 Merge pull request Xilinx#106 from liyuanz/replace_blacklist 28fe2ed replace whiltelist/blacklist to allowlist/blocklist 981b5a2 Merge pull request Xilinx#105 from changg/pr_104 2f45a63 add time for hw_build a21b8db add time 7256e35 add time 5f2c36a Merge pull request Xilinx#102 from changg/add_extraflags acce305 fix utils.mk 74536af fix utils.mk 3c0647e Merge pull request Xilinx#101 from liyuanz/next fc26744 increase mem 7a1b220 Merge pull request Xilinx#99 from changg/fix_mks 055c521 fix typ 44ff7b9 fix utils.mk 4050d17 Merge pull request Xilinx#98 from liyuanz/replace_targets b0157d6 update targes e41fc60 Merge pull request Xilinx#96 from changg/metadata f6d1e26 draft metadata 0bbb982 change 2021.2_stable_latest to 2022.1_stable_latest Co-authored-by: sdausr <[email protected]>
- Loading branch information