[SYCL][Doc] Fix tbb target path in Get Started Guide. #1695
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The previous guide suggests linking tbb to `/opt/intel/oclcpuexp/` which is not in the `LD_PATH`
vladimirlaz
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vladimirlaz
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May 17, 2020
Co-authored-by: vladimirlaz <[email protected]>
Co-authored-by: vladimirlaz <[email protected]>
Co-authored-by: vladimirlaz <[email protected]>
Co-authored-by: vladimirlaz <[email protected]>
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Indeed, thanks @vladimirlaz for pointing out! |
bader
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* sycl: (65 commits) [SYCL] Host task implementation (intel#1471) [SYCL] Update getting dependencies documentation (intel#1699) [SYCL] Fix types and transparent functors recognition in reduction (intel#1709) [SYCL][Doc] Get started guide clean-up (intel#1697) Add --spirv-fp-contract={on|off|fast} option (intel#509) [SYCL][Doc] Fix tbb target path in Get Started Guide. (intel#1695) [SYCL] Add support for kernel name types templated using enums. (intel#1675) [Driver][SYCL] Make -std=c++17 the default for DPC++ (intel#1662) AllocaInst should store Align instead of MaybeAlign. [X86] Replace selectScalarSSELoad ComplexPattern with PatFrags to handle the 3 types of loads we currently match. Harden IR and bitcode parsers against infinite size types. Revert "[nfc] test commit" [nfc] test commit Expose IRGen API to add the default IR attributes to a function definition. The release notes for ObjCBreakBeforeNestedBlockParam was placed between the release note for IndentCaseBlocks and its example code [VectorCombine] forward walk through instructions to improve chaining of transforms [PhaseOrdering] add vector reduction tests; NFC [InstCombine] Clean up alignment handling (NFC) [ARM] Patterns for VQSHRN [VectorCombine] add reduction-like patterns; NFC ...
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The previous guide suggests linking tbb to
/opt/intel/oclcpuexp/which is not in theLD_PATH