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Just to set the base point #14

Merged
merged 175 commits into from
Oct 23, 2023
Merged

Just to set the base point #14

merged 175 commits into from
Oct 23, 2023

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JuanSapriza
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JuanSapriza added 30 commits March 1, 2023 15:44
@JuanSapriza
Updated README file to refer to x-heep repo documentation.
b31b44d
@JuanSapriza
Corrected a typo
ba04760
@JuanSapriza
Made the link specific to prequisite section
2828ce4
@JuanSapriza
Modified vendor hjson
049f0e8
@JuanSapriza
Update esl_epfl_x_heep to esl-epfl/x-heep@495ad7a
4447e45 
Update code from upstream repository https://github.com/esl-
epfl/x-heep.git to revision 495ad7ac19c2bfd6a0cc8c68deafccdfb2f7da3b

* update docs (esl-epfl/x-heep#209) (David Mallasén Quintana)
* Automatisation of CMake back-end (esl-epfl/x-heep#207) (jmiranda)
* Add initial guide on extending X-HEEP with CORE-V-XIF (esl-
  epfl/x-heep#205) (David Mallasén Quintana)
* update app (davide schiavone)
* update debug.md (Davide Schiavone)
* add FreeRTOS support and CMake compatible sw compilation (esl-
  epfl/x-heep#191) (jmiranda)
* add support for cv32e40x (esl-epfl/x-heep#197) (David Mallasén
  Quintana)
* fix common cell (davide schiavone)
* [wip] add support for SkyWater130 and OpenRoad (esl-epfl/x-heep#181)
  (Davide Schiavone)
* add Linux-hosted fpga emulation platform (femu) (esl-
  epfl/x-heep#189) (Saverio Nasturzio)
* fix stepi on cve2 (Schiavone Pasquale Davide)
* automatic structs generation (esl-epfl/x-heep#196) (Stefano Albini)
* automate peripheral integration (esl-epfl/x-heep#195) (fimtrey)
* new gpio from pulp (esl-epfl/x-heep#186) (Davide Schiavone)
* clock-gating of peripheral subsystem and memory banks (esl-
  epfl/x-heep#187) (Saverio Nasturzio)
* Auto create virtualenv for FuseSoC + other python scripts (esl-
  epfl/x-heep#188) (Manuel Eggimann)
* fix apps and linker script (esl-epfl/x-heep#176) (Simone Machetti)
* add spi2 in peripheral domain (esl-epfl/x-heep#180) (Davide
  Schiavone)
* Fixed error in block diagram. (esl-epfl/x-heep#178) (Simone
  Machetti)
* Update README.md (Davide Schiavone)
* Added block diagrams. (esl-epfl/x-heep#177) (Simone Machetti)
* Update README.md (Davide Schiavone)

Signed-off-by: Juan Sapriza <[email protected]>
@JuanSapriza
Modified internal sw structure
f730d8f
@JuanSapriza
Modified folder structure to be compatible with the new compilation flow
70f69b8
@JuanSapriza
renamed the x-heep vendor files
4edef8c
@JuanSapriza
Update esl_epfl_x_heep to esl-epfl/x-heep@c87d7ea
b580e81 
Update code from upstream repository https://github.com/esl-
epfl/x-heep.git to revision c87d7ea9888a4353177b76b790019cf1c0c2c481

* add sw build from external (esl-epfl/x-heep#217) (JuanSapriza)
* Update OpenTitan doc links in README.md (esl-epfl/x-heep#216)
  (ruben-roalvarez)
* Removed bit-fields from peripherlas' structs generation (esl-
  epfl/x-heep#213) (Stefano Albini)
* fix esl-epfl/x-heep#71 (Davide Schiavone)
* Automate interrupt integration (esl-epfl/x-heep#202) (fimtrey)
* Add LLVM-Clang support (esl-epfl/x-heep#208) (David Mallasén
  Quintana)
* Update OpenRoadFlow.md (Davide Schiavone)
* Fix questasim simulation with flash (esl-epfl/x-heep#211) (David
  Mallasén Quintana)

Signed-off-by: Juan Sapriza <[email protected]>
@JuanSapriza
Added vendor file (was not untracked before).
36e90f8
@JuanSapriza
Major changes to make the cgra code compile
d965d53
@JuanSapriza
Made the necessary changes for verilator-sim to work
f060995
@JuanSapriza
Updated a name in func_test main.c
08ec55b
@JuanSapriza
It is possible to simulate a test from uppermost source folder, with …
93731fb 
…cgra, via make run PROJECT=cgra_dbl_search
@JuanSapriza
Compiles both CGRA apps, now includes .c files in the project folder
980f358
@JuanSapriza
Made changes in Compilation flow to include files from linked folders.
5d33c54
@JuanSapriza
Reduced the CMakeLists to make it more scalable.
34d3730
@JuanSapriza
Cleaned up the CMakelists a bit
1d3cb29
@JuanSapriza
Added / around the folder criteria to add files to list to prevent fi…
cba5d9d 
…les with keywords in the name from being added.
@JuanSapriza
Updated the CMakelist to match changes done in x-heep branch (not yet…
2db305a 
… merged, but to prevent missing this by mistake)
@JuanSapriza
Updated the vendor file to include a specific SHA
b4134fc
@JuanSapriza
Update esl_epfl_x_heep to esl-epfl/x-heep@95256ea
bc7629c 
Update code from upstream repository https://github.com/esl-
epfl/x-heep.git to revision 95256ea6f01b665222be18c05ead2da1303729b8

* add tc_clk_xor2 (esl-epfl/x-heep#225) (Tim Frey)
* fix venv / conda envs (esl-epfl/x-heep#221) (Davide Schiavone)
* update common cells (esl-epfl/x-heep#223) (Davide Schiavone)
* Add pynq-z2 board files (esl-epfl/x-heep#212) (David Mallasén
  Quintana)
* Fixed two bugs (OBJ_PATH for clang and creeation of links). (esl-
  epfl/x-heep#222) (JuanSapriza)
* add sw build from external (esl-epfl/x-heep#217) (JuanSapriza)
* Update OpenTitan doc links in README.md (esl-epfl/x-heep#216)
  (ruben-roalvarez)
* Removed bit-fields from peripherlas' structs generation (esl-
  epfl/x-heep#213) (Stefano Albini)
* fix esl-epfl/x-heep#71 (Davide Schiavone)
* Automate interrupt integration (esl-epfl/x-heep#202) (fimtrey)
* Add LLVM-Clang support (esl-epfl/x-heep#208) (David Mallasén
  Quintana)
* Update OpenRoadFlow.md (Davide Schiavone)
* Fix questasim simulation with flash (esl-epfl/x-heep#211) (David
  Mallasén Quintana)

Signed-off-by: Juan Sapriza <[email protected]>
@JuanSapriza
updated the README to point to the vendorized documentation.
cdea866
@JuanSapriza
Updated vendor file to add fpga board files
d2546b1
@JuanSapriza
Update esl_epfl_x_heep to esl-epfl/x-heep@158a70c
9b6490e 
Update code from upstream repository https://github.com/esl-
epfl/x-heep.git to revision 158a70c92b16a7ab207fe25eae6e131e461d631d

* Add pynq-z2 board files (esl-epfl/x-heep#212) (David Mallasén
  Quintana)
* Fixed two bugs (OBJ_PATH for clang and creeation of links). (esl-
  epfl/x-heep#222) (JuanSapriza)

Signed-off-by: Juan Sapriza <[email protected]>
@JuanSapriza
In this configuration it is possible to make vivado-fpga. CGRA workin…
74ebc4a 
…g on FPGA
@JuanSapriza
Cleaned the files modified for the synthesis for fpga
dffab17
@JuanSapriza
Restored the CGRA files to they original values and added external cg…
30f747c 
…ra_fpga files. Synthezised and tested on FPGA
@JuanSapriza
Removed some changes done inside the cgra
db30a6c
@JuanSapriza
Fixed some names that were modified in previous commits.
8e0ff5c
JuanSapriza added 29 commits June 19, 2023 14:04
@JuanSapriza
Can be implemented, but chraseh on CGRA memory access
c6cf078
@JuanSapriza
Crashes on read
3b62553
@JuanSapriza
:wip: fix external domain
d6f8064
@JuanSapriza
almost fix vendor
eb16204
@JuanSapriza
add .venv symbolink link
2be6a20
@JuanSapriza
Updated vendor file
1d763f2
@JuanSapriza
Update esl_epfl_x_heep to esl-epfl/x-heep@435c869
78f07d5 
Update code from upstream repository https://github.com/esl-
epfl/x-heep.git to revision 435c869a6861f71a045d91464cdedbcf6d1777e7

* Interrupt ID to the intr handlers of the PLIC (esl-epfl/x-heep#315)
  (JuanSapriza)
* add ports to DMA to write to addresses coming from port2 of DMA
  (esl-epfl/x-heep#320) (Davide Schiavone)
* DMA HAL - clean PR (esl-epfl/x-heep#317) (JuanSapriza)
* Cleaning up flags (esl-epfl/x-heep#316) (Davide Schiavone)
* Add support for externally defined external pads in `Makefile` (esl-
  epfl/x-heep#312) (Michele Caon)
* Linker load flash refactor fill memory (esl-epfl/x-heep#294)
  (jmiranda)
* add i2s peripheral (esl-epfl/x-heep#203) (Tim Frey)
* Add example ADC schematic (esl-epfl/x-heep#309) (Cyril)
* Update `cv32e40x` version to `0.9.0` (esl-epfl/x-heep#308) (Michele
  Caon)
* integration of an AMS peripheral example (esl-epfl/x-heep#270)
  (Cyril)
* Update FuseSoC remote (esl-epfl/x-heep#307) (Michele Caon)
* fix USE_SPI_FLASH for FPGA (esl-epfl/x-heep#301) (Davide Schiavone)
* add ifdef peripheral included (esl-epfl/x-heep#288) (Davide
  Schiavone)
* Added command in CI to include all peripherals before building.
  (esl-epfl/x-heep#293) (JuanSapriza)

Signed-off-by: Juan Sapriza <[email protected]>
@JuanSapriza
Removed virtual environment that was being pushed. Updated pins from …
0b46b1e 
…new peripherals in X-HEEp
@JuanSapriza
Successfully simulated i nverilator
610d9b0
@JuanSapriza
cgra_func_test working on verilator
4c0199a
@JuanSapriza
Both apps working on FPGA
41247a2
@JuanSapriza
Updated lint CI to make venv
46ed090
@JuanSapriza
Added the venv activation
b669e75
@JuanSapriza
Added non-picocom option to run on the FPGA
109c740
@JuanSapriza
Added comment on how to run on fpga in the README file
b4e011f
@JuanSapriza
Merged integration pynq
8ac2031
@JuanSapriza
Updated so to run apps in the FPGA
72e2878
@JuanSapriza
Kernel test working for 4x4
699fe52
@JuanSapriza
Convolution running sucessfully in software
5da2011
@JuanSapriza
Added a 3x3 convolution - most basic example
2d3f1b4
@JuanSapriza
Test for convolution
ac04146
@JuanSapriza
Merge branch 'kernel_test'
0490391
@JuanSapriza
Merged kernel_tests into main
3be3019
@JuanSapriza
Fixed conflict in tb
5d3ad8c
@JuanSapriza
Added temporary register to verilator waiver
4d0285d
@JuanSapriza
Updated the links to the tb_top
00b30e9
@JuanSapriza
Removed a vscode folder
d1e2e82
@JuanSapriza
Removed sudo from run commands on makefile and left repo running reve…
755214c 
…rsebits
@JuanSapriza
Changed default kernel
7523467
@JuanSapriza JuanSapriza merged commit fc917fb into esl-epfl:main Oct 23, 2023
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@JuanSapriza