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Just to set the base point#14

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JuanSapriza merged 175 commits intoesl-epfl:mainesl-epfl/HEEPsilon:mainfrom JuanSapriza:mainJuanSapriza/HEEPsilon:mainCopy head branch name to clipboardOct 23, 2023

+3-3

Commits

Commits on Mar 1, 2023

• Updated README file to refer to x-heep repo documentation.

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• Corrected a typo

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• Made the link specific to prequisite section

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• Modified vendor hjson

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• Update esl_epfl_x_heep to esl-epfl/x-heep@495ad7a

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Commits on Mar 9, 2023

• Modified internal sw structure

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Commits on Mar 13, 2023

• Modified folder structure to be compatible with the new compilation flow

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• renamed the x-heep vendor files

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• Update esl_epfl_x_heep to esl-epfl/x-heep@c87d7ea

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• Added vendor file (was not untracked before).

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• Major changes to make the cgra code compile

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Commits on Mar 14, 2023

• Made the necessary changes for verilator-sim to work

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• Updated a name in func_test main.c

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• It is possible to simulate a test from uppermost source folder, with cgra, via make run PROJECT=cgra_dbl_search

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Commits on Mar 16, 2023

• Compiles both CGRA apps, now includes .c files in the project folder

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• Made changes in Compilation flow to include files from linked folders.

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• Reduced the CMakeLists to make it more scalable.

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• Cleaned up the CMakelists a bit

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• Added / around the folder criteria to add files to list to prevent files with keywords in the name from being added.

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• Updated the CMakelist to match changes done in x-heep branch (not yet merged, but to prevent missing this by mistake)

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• Updated the vendor file to include a specific SHA

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• Update esl_epfl_x_heep to esl-epfl/x-heep@95256ea

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• updated the README to point to the vendorized documentation.

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Commits on Mar 17, 2023

• Updated vendor file to add fpga board files

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• Update esl_epfl_x_heep to esl-epfl/x-heep@158a70c

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Commits on Mar 21, 2023

• In this configuration it is possible to make vivado-fpga. CGRA working on FPGA

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Commits on Mar 22, 2023

• Cleaned the files modified for the synthesis for fpga

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Commits on Mar 24, 2023

• Restored the CGRA files to they original values and added external cgra_fpga files. Synthezised and tested on FPGA

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Commits on Mar 27, 2023

• Removed some changes done inside the cgra

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• Fixed some names that were modified in previous commits.

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• Removed visibility signals where they didnt belong so it could be built for simulation

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• Removed unnecessary signals

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Commits on Apr 4, 2023

• Added some commands to quickly load into the fpga

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• Added the venv to the gitignore

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  f81aa5b

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• Moved the core and added the kernel applications

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• Removed rand because was not allwing to build

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• Can run bitcount. Removed unnecessary printfs

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  7b36034

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• Updated the gsm project structure

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• Added gsm folder

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Commits on Apr 5, 2023

• Restructured how kernels are organized in folders.

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Commits on Apr 6, 2023

• Restructure is working, but gets errors

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• Restructure is working, but gets errors

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• Stats are reported both in tabbed and latex format

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• Produces a neat outut with average and variance values

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• Made 250 iterations. Dies @ 500

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Commits on Apr 11, 2023

• Now values are presented in cycles

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• Prints the ratio between cgra and software execution

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• Addded utility scripts

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• Added a plot to see the active cycles distribution in time

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• Previous to trying new generator

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Commits on Apr 12, 2023

• Multiple kernels are run, but results vary in unomalous ways

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Commits on Apr 13, 2023

• added edadk.conf and env.sh

  

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• Added scripts for simulation and synthesis. Problemas with including packages

  

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• Multiple kernels cannot be run one after the other

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Commits on Apr 14, 2023

• Can make questasim-sim suceesfully

  

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Commits on Apr 17, 2023

• Added pin toggle and reduced the number of unneccessary printfs

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Commits on Apr 18, 2023

• Gets the cycle count considering the delay of writing register. Accurate ~3 cycles

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• Now prints std deviation instead of variance

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• Added a larger access flat cost to match. Timer cycles match reported cycles.

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Commits on Apr 19, 2023

• Added the reversebit kernel. Runs, but no in conjuntion with other kernels. It seems they are not re-configuring

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• Reorganized the process of launching kernels, but the second kernel is not configured

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Commits on Apr 20, 2023

• Change the kernel id on each kernel change. Now they cofigure properly. Added the possibility of configuring the vcd trigger by gpio

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Commits on Apr 21, 2023

• Moved functions to kernel commons. Fixed sqrt. Fixed some lucky situations concerning interrupts. GSM can break if a printf is put between the kernel launch and the wait for interrupt.

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• Major refactoring and commenting of the heeptest_gen.py. Generated and added sha2, but results in errors.

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• GSM is working with new changes in heeptest_gen

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• Changed the information of the sha2 io.json and the heeptest_gen so that the cgra_output is taken from the correct field

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• With the modifications in the io.json and heeptest_gen every kernel is running without errors.

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• From the kernel common header you can choose to print all the cgra results and the comparison with software

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Commits on Apr 24, 2023

• Added sha and sqrt, but none of them work properly

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• Rebuilt the old kernels so that they are all under the same script. Had to fix io.json of gsm that was working because there was a bug and the in vars had depth 1

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• bitcount, reversebits, sha2 and gsm without errors

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• bitcount, reversebits, gsm, sha and sha2 work. Only 4 kernels work toghether, the fifth gets stuck or returns errors.

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• Modified path to kernel_commons from header template

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Commits on Apr 25, 2023

• Intermediate commit

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Commits on Apr 26, 2023

• Corrected gsm kernel. Addd a debug option for sqrt, which is not working. Added watchdog for broken kernels.

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Commits on Apr 27, 2023

• To test on Questasim

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• Some modification on the patch modelsim

  

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• Merge branch 'simulations' into kernel_tests_py

  

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• Made some modifications to the strsearch function and source file to debug

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Commits on Apr 28, 2023

• Adapted the way of accessing inputs and outputs from the kernel_commons. GSM works with old confi now. Must re-do all kernels

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• Sqrt inputs limited to positive numbers

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• All kernels working independently, but not toghther

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• imem is now a constant, but still not many kernels can be run at the same time

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Commits on May 1, 2023

• 6 kernels can be run, but only up to 5 iterations, no prints apart from the summaries. Bitcount is broken

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• All kernels can be run, up to 5 iterations

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• Beginning of stringsearch tests

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• Made some modifications to the instr-encoder so that the strsearch kernel could be re-generated. Now it runs, but gives a wrong answer

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• C function is working

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• C function is working

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• To test signals

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Commits on May 2, 2023

• Passing patlen -2 allows strsearch to finish properly, but always returns skip2

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• With the corrected kernel assembly the str search kernels seems to work

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• Stringsearch working, but lowercase conversion failing

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• string search is generally working. Only starnge case in last commit is pending

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Commits on May 4, 2023

• Tests with fixed patterns

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Commits on May 8, 2023

• Fixed pattern tests with updated assembly from USI

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Commits on May 10, 2023

• Updated CMakeLists.txt file from x-heep to allow seemless building of apps in the x-heep repo

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• Added the License file

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• Moved the cgra-x_heep_core to the base folder, as it was preventing the make vivado-fpga

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Commits on May 11, 2023

• Merged with the latest updates in the kernel_tests

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• Merge branch 'integration-pynq-z2' into kernel_test

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• Merge branch 'kernel_test' into test-strsearch

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• Merge branch 'test-strsearch' into kernel_test_sim

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• Re-generated the bitstream from the assembly from USI

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• Added fixed arrays for testing

  

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• reverted changes to cgra.sv

  

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• Added the exit command to the assembly, which was causing the app to crash

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• Patched scrit and added core to allow questasim-sim-opt

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• Updated the bitstream to a working one

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• Added changes in logic of RCs. Still changing last value of result RC

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Commits on May 15, 2023

• Cleaned the modifications in the cgra.sv file. This works both on Questasim and FPGA.

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• Brought changes tested on kernel_test_sim to to use in the FPGA

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• The 7 kernels can be run on the pynq-z2

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• Removed wrong comment

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• Merge branch 'main' of https://github.com/esl-epfl/cgra_x_heep

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Commits on May 16, 2023

• Updated the vendor file

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• Merged further changes from main

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• Merge commit 'cdea866' into test_4

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• Merged further changes from main

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• Renamed vendor files for consistency with lint checks

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• Updated the vendor sha

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• Update esl_epfl_x_heep to esl-epfl/x-heep@9eb9c1c

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• Reformated files

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• Update esl_epfl_x_heep to esl-epfl/x-heep@9eb9c1c

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• formatted with verible

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• Added verible command to mcu-gen, which was lost

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• Modified the README to direct to the vendorized X-HEEP prerequisistes

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• Corrected a typo

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• Removed unnecessary content from core

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Commits on May 17, 2023

• Updated the mcu-gen of the topmost Makefile to call the one from X-HEEP and only afterwards call the mc_gen.py with the testbench.

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• Changed the EXT_XBAR_NMASTER param for EXT_DOMAINS_RND to comply with the changes of #247. Now mcu-gen EXTERNAL_DOMAINS=4 is needed. Also had to add dummy (unused) logic variables or otherwise a va…

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• Improved the names of the dummy variables

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Commits on May 22, 2023

• Moved the xilinx_cgra_x_heep_wrapper int othe fpga_cgra folder.

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Commits on May 23, 2023

• Fixed the computation of the deviation. Still some differences with post-synthesis simulation

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• Added the generation of new VCD files by toggling of GPIO

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• Merged kernel test into simulation version

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• Adapted for FPGA. Running

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• Re-adapted the value to be substarcted to the time measured

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Commits on May 30, 2023

• Updated vendor file

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• Update esl_epfl_x_heep to esl-epfl/x-heep@a22056c

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Commits on Jun 12, 2023

• Added the CGRA PLIC interrupt

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Commits on Jun 16, 2023

• CGRA dbl search working

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• cgra functional test working

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• Do not continue with mcu-gen if there was an error

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• Updated names to comply with changes in X-HEEP

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• Changed the use of EXTERNAL_DOMAINS back to EXT_XBAR_NMASTER in cgra_x_heep_top

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Commits on Jun 19, 2023

• Can be implemented, but chraseh on CGRA memory access

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Commits on Jun 20, 2023

• Crashes on read

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Commits on Jun 21, 2023

• :wip: fix external domain

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• almost fix vendor

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• add .venv symbolink link

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Commits on Jul 10, 2023

• Updated vendor file

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  1d763f2

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• Update esl_epfl_x_heep to esl-epfl/x-heep@435c869

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• Removed virtual environment that was being pushed. Updated pins from new peripherals in X-HEEp

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  0b46b1e

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• Successfully simulated i nverilator

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  610d9b0

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• cgra_func_test working on verilator

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  4c0199a

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• Both apps working on FPGA

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  41247a2

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• Updated lint CI to make venv

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• Added the venv activation

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• Added non-picocom option to run on the FPGA

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• Added comment on how to run on fpga in the README file

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Commits on Aug 28, 2023

• Merged integration pynq

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• Updated so to run apps in the FPGA

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  72e2878

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• Kernel test working for 4x4

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  699fe52

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• Convolution running sucessfully in software

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  5da2011

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• Added a 3x3 convolution - most basic example

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  2d3f1b4

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Commits on Sep 1, 2023

• Test for convolution

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Commits on Oct 23, 2023

• Merge branch 'kernel_test'

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• Merged kernel_tests into main

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  3be3019

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• Fixed conflict in tb

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  5d3ad8c

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• Added temporary register to verilator waiver

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• Updated the links to the tb_top

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• Removed a vscode folder

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  d1e2e82

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• Removed sudo from run commands on makefile and left repo running reversebits

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  755214c

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• Changed default kernel

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  7523467

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