i#2626 Add #fbits fixed-point handling to AArch64 codec #4860
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AssadHashmi
commented
Apr 19, 2021
| 1001111000111001000000xxxxxxxxxx fcvtzu x0 : s5 | ||
| 0001111001111001000000xxxxxxxxxx fcvtzu w0 : d5 | ||
| 1001111001111001000000xxxxxxxxxx fcvtzu x0 : d5 | ||
| x001111000111001000000xxxxxxxxxx fcvtzu wx0 : s5 |
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This patch folds the 4 fcvtzs x0 : <FPreg>5 and fcvtzs w0 : <FPreg>5 encodings into 2 fcvtzs wx0 : <FPreg>5 encodings. A subsequent PR will check and fold others.
derekbruening
approved these changes
Apr 19, 2021
core/ir/aarch64/codec.c
Outdated
| @@ -1557,6 +1557,35 @@ encode_opnd_cond(uint enc, int opcode, byte *pc, opnd_t opnd, OUT uint *enc_out) | |||
| return encode_opnd_int(12, 4, false, 0, 0, opnd, enc_out); | |||
| } | |||
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| /* scale: scalar encoding of #fbits operand (number of bits after the decimal point for | |||
| * fixed-point values) */ | |||
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style: Capitalize w/ punctuation for complete sentence
style: prefer */ on own line (unfortunately no clang-format rule to enforce it)
core/ir/aarch64/codec.c
Outdated
| @@ -2140,6 +2169,34 @@ encode_opnd_vindex_H(uint enc, int opcode, byte *pc, opnd_t opnd, OUT uint *enc_ | |||
| return true; | |||
| } | |||
|
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| /* immhb: vector encoding of #fbits operand (number of bits after the decimal point for | |||
| * fixed-point values) */ | |||
core/ir/aarch64/instr_create_api.h
Outdated
| @@ -1759,6 +1759,19 @@ enum { | |||
| #define INSTR_CREATE_fcvtzu_vector(dc, Rd, Rm, width) \ | |||
| instr_create_1dst_2src(dc, OP_fcvtzu, Rd, Rm, width) | |||
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|
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| /** | |||
| * Creates a FCVTZU vector floating-point to fixed-point convert instruction. | |||
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Same comment as on Matt's PR: s/a/an/ for most common pronunciation. Ditto below.
| @@ -1557,6 +1557,35 @@ encode_opnd_cond(uint enc, int opcode, byte *pc, opnd_t opnd, OUT uint *enc_out) | |||
| return encode_opnd_int(12, 4, false, 0, 0, opnd, enc_out); | |||
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i#2626 Add #fbits fixed-point handling to AArch64 codec
nit: Missing mini-description and colon after issue number prefix
fengjixuchui
added a commit
to fengjixuchui/dynamorio
that referenced
this pull request
Apr 21, 2021
i#2626 AArch64 codec: add #fbits fixed-point handling (DynamoRIO#4860)
joshua-warburton
added a commit
that referenced
this pull request
Sep 9, 2021
This patch implements the instructions: SQSHL <V><d>, <V><n>, #<shift> SHL <Vd>.<T>, <Vn>.<T>, #<shift> SLI <Vd>.<T>, <Vn>.<T>, #<shift> To implement these instructions an additional operand was necessary to allow a zero-indexed shift. The appropriate encode tests for an instruction using this immhb_0shf operand have been added. Issue: #4860
joshua-warburton
added a commit
that referenced
this pull request
Aug 4, 2022
This patch adds the following decodes, encoding macros
and appropriate tests for both
BCAX <Bd>.16B, <Bn>.16B, <Bm>.16B, <Ba>.16B
EOR3 <Bd>.16B, <Bn>.16B, <Bm>.16B, <Ba>.16B
ESB
PSB
These instructions are part of features that have not
yet been added, so BASE has been used as a placeholder
where appropriate
Issue: #4860
dolanzhao
pushed a commit
that referenced
this pull request
Aug 4, 2022
This patch adds the following decodes, encoding macros
and appropriate tests for both
BCAX <Bd>.16B, <Bn>.16B, <Bm>.16B, <Ba>.16B
EOR3 <Bd>.16B, <Bn>.16B, <Bm>.16B, <Ba>.16B
ESB
PSB
These instructions are part of features that have not
yet been added, so BASE has been used as a placeholder
where appropriate
Issue: #4860
joshua-warburton
added a commit
that referenced
this pull request
Aug 8, 2022
This patch updates the following decodes, encoding macros
and appropriate tests for both. It also aligns the fccm*
instructions with the ccm* instructions, it hoists the
condition to the mnemonic and designates it as a
predicate.
FCCMP <Dn>, <Dm>, #<imm>, <cond>
FCCMP <Hn>, <Hm>, #<imm>, <cond>
FCCMP <Sn>, <Sm>, #<imm>, <cond>
FCCMPE <Dn>, <Dm>, #<imm>, <cond>
FCCMPE <Hn>, <Hm>, #<imm>, <cond>
FCCMPE <Sn>, <Sm>, #<imm>, <cond>
FCMP <Dn>, #0.0
FCMP <Hn>, #0.0
FCMP <Sn>, #0.0
FCMP <Dn>, <Dm>
FCMP <Hn>, <Hm>
FCMP <Sn>, <Sm>
FCMPE <Dn>, #0.0
FCMPE <Hn>, #0.0
FCMPE <Sn>, #0.0
FCMPE <Dn>, <Dm>
FCMPE <Hn>, <Hm>
FCMPE <Sn>, <Sm>
Issue: #4860
joshua-warburton
added a commit
that referenced
this pull request
Aug 15, 2022
This patch adds the appropriate macros, tests and codec entries to encode the following variants: FMLA <Hd>.<Ts>, <Hn>.<Ts>, <Hm>.<Ts> FMLA <Dd>.<Ts>, <Dn>.<Ts>, <Dm>.<Ts> FMLA <Hd>.<Ts>, <Hn>.<Ts>, <Hm>.H[<index>] FMLA <Dd>.<Ts>, <Dn>.<Ts>, <Dm>.<Tb>[<index>] FMLA <Hd>, <Hn>, <Hm>.H[<index>] FMLA <V><d>, <V><n>, <Sm>.<Ts>[<index>] FMLAL <Sd>.<Ts>, <Hn>.<Tb>, <Hm>.<Tb> FMLAL <Sd>.<Ts>, <Hn>.<Tb>, <Hm>.H[<index>] FMLAL2 <Sd>.<Ts>, <Hn>.<Tb>, <Hm>.<Tb> FMLAL2 <Sd>.<Ts>, <Hn>.<Tb>, <Hm>.H[<index>] FMLS <Hd>.<Ts>, <Hn>.<Ts>, <Hm>.<Ts> FMLS <Dd>.<Ts>, <Dn>.<Ts>, <Dm>.<Ts> FMLS <Hd>.<Ts>, <Hn>.<Ts>, <Hm>.H[<index>] FMLS <Dd>.<Ts>, <Dn>.<Ts>, <Dm>.<Tb>[<index>] FMLS <Hd>, <Hn>, <Hm>.H[<index>] FMLS <V><d>, <V><n>, <Sm>.<Ts>[<index>] Issues: #4860
derekbruening
pushed a commit
that referenced
this pull request
Aug 26, 2022
This patch adds the appropriate macros, tests and codec entries to encode the following variants: FMLA <Hd>.<Ts>, <Hn>.<Ts>, <Hm>.<Ts> FMLA <Dd>.<Ts>, <Dn>.<Ts>, <Dm>.<Ts> FMLA <Hd>.<Ts>, <Hn>.<Ts>, <Hm>.H[<index>] FMLA <Dd>.<Ts>, <Dn>.<Ts>, <Dm>.<Tb>[<index>] FMLA <Hd>, <Hn>, <Hm>.H[<index>] FMLA <V><d>, <V><n>, <Sm>.<Ts>[<index>] FMLAL <Sd>.<Ts>, <Hn>.<Tb>, <Hm>.<Tb> FMLAL <Sd>.<Ts>, <Hn>.<Tb>, <Hm>.H[<index>] FMLAL2 <Sd>.<Ts>, <Hn>.<Tb>, <Hm>.<Tb> FMLAL2 <Sd>.<Ts>, <Hn>.<Tb>, <Hm>.H[<index>] FMLS <Hd>.<Ts>, <Hn>.<Ts>, <Hm>.<Ts> FMLS <Dd>.<Ts>, <Dn>.<Ts>, <Dm>.<Ts> FMLS <Hd>.<Ts>, <Hn>.<Ts>, <Hm>.H[<index>] FMLS <Dd>.<Ts>, <Dn>.<Ts>, <Dm>.<Tb>[<index>] FMLS <Hd>, <Hn>, <Hm>.H[<index>] FMLS <V><d>, <V><n>, <Sm>.<Ts>[<index>] Issues: #4860
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This patch adds
scaleandimmh:immbbitfeld handlingfor the
#fbitsvalue in the codec using theFCVTZUinstruction as a use-case.
Issues: #2626, #4848