i#2626: AArch64 v8.0 decode: Add SQSHL, SHL and SLI #5084
Merged
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This patch implements the instructions:
SQSHL <V><d>, <V><n>, #<shift>
SHL <Vd>.<T>, <Vn>.<T>, #<shift>
SLI <Vd>.<T>, <Vn>.<T>, #<shift>
To implement these instructions an additional
operand was necessary to allow a zero-indexed
shift. The appropriate encode tests for an
instruction using this immhb_0shf operand have
been added.
Issue: #2626