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Bump esp-tools (March 2021) #837

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merged 17 commits into from
Jun 10, 2021
Merged

Bump esp-tools (March 2021) #837

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ae304a8
Add repo to run CI
zitaofang Mar 27, 2021
53daab2
Test removing xhwacha
zitaofang Apr 14, 2021
27d9228
Manually apply hwacha changes to binutils
zitaofang Apr 15, 2021
b77afa3
change asm instruction format
zitaofang Apr 15, 2021
c8b1c21
Merge branch 'dev' of github.com:ucb-bar/chipyard into mar2021-esp-bump
zitaofang May 21, 2021
f76601c
Fixed unmatched version for custom extension
zitaofang May 23, 2021
a5cf4ad
Pass local build
zitaofang May 24, 2021
cbefcd5
Finished bump
zitaofang May 25, 2021
5890d74
Add multiple extension support to the bump
zitaofang May 25, 2021
a18f740
Remove hvsetvl
zitaofang Jun 4, 2021
f8f7d36
Fix conflict
zitaofang Jun 4, 2021
95e245a
Change spike version
zitaofang Jun 6, 2021
798d523
Update sha3 repo
zitaofang Jun 6, 2021
56f595b
Fix toolchain used for sha3
zitaofang Jun 6, 2021
00da2c1
Update config.yml
alonamid Jun 9, 2021
65784ab
Update riscv-pk
zitaofang Jun 9, 2021
39956dd
Merge branch 'mar2021-esp-bump' of github.com:ucb-bar/chipyard into m…
zitaofang Jun 9, 2021
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3 changes: 2 additions & 1 deletion .circleci/config.yml
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Original file line number Diff line number Diff line change
Expand Up @@ -6,7 +6,7 @@ version: 2.1
parameters:
tools-cache-version:
type: string
default: "v9"
default: "v10"

# default execution env.s
executors:
Expand Down Expand Up @@ -287,6 +287,7 @@ jobs:
executor: main-env
steps:
- run-tests:
tools-version: "esp-tools"
group-key: "group-accels"
project-key: "chipyard-sha3"
chipyard-streaming-fir-run-tests:
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3 changes: 3 additions & 0 deletions .circleci/run-tests.sh
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Original file line number Diff line number Diff line change
Expand Up @@ -65,6 +65,9 @@ case $1 in
$LOCAL_SIM_DIR/simulator-chipyard-GemminiRocketConfig $GEMMINI_SOFTWARE_DIR/build/bareMetalC/mvin_mvout-baremetal
;;
chipyard-sha3)
export RISCV=$LOCAL_ESP_DIR
export LD_LIBRARY_PATH=$LOCAL_ESP_DIR/lib
export PATH=$RISCV/bin:$PATH
(cd $LOCAL_CHIPYARD_DIR/generators/sha3/software && ./build.sh)
$LOCAL_SIM_DIR/simulator-chipyard-Sha3RocketConfig $LOCAL_CHIPYARD_DIR/generators/sha3/software/benchmarks/bare/sha3-rocc.riscv
;;
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2 changes: 1 addition & 1 deletion generators/sha3
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Submodule sha3 updated 32 files
+0 −4 isa-sim/.gitignore
+0 −30 isa-sim/build.sh
+0 −1 isa-sim/riscv-isa-sim
+0 −1 isa-sim/spike-sha3/LICENSE
+0 −1 isa-sim/spike-sha3/Makefile.in
+0 −1 isa-sim/spike-sha3/README.md
+0 −1 isa-sim/spike-sha3/aclocal.m4
+0 −106 isa-sim/spike-sha3/config.h.in
+0 −6,217 isa-sim/spike-sha3/configure
+0 −114 isa-sim/spike-sha3/configure.ac
+0 −1 isa-sim/spike-sha3/debug_rom
+0 −1 isa-sim/spike-sha3/dummy_rocc
+0 −1 isa-sim/spike-sha3/riscv
+0 −1 isa-sim/spike-sha3/riscv-dummy_rocc.pc.in
+0 −1 isa-sim/spike-sha3/riscv-riscv.pc.in
+0 −11 isa-sim/spike-sha3/riscv-sha3.pc.in
+0 −1 isa-sim/spike-sha3/riscv-softfloat.pc.in
+0 −1 isa-sim/spike-sha3/riscv-spike.pc.in
+0 −1 isa-sim/spike-sha3/riscv-spike_main.pc.in
+0 −1 isa-sim/spike-sha3/scripts
+0 −4 isa-sim/spike-sha3/sha3/sha3.ac
+0 −157 isa-sim/spike-sha3/sha3/sha3.cc
+0 −137 isa-sim/spike-sha3/sha3/sha3.h
+0 −12 isa-sim/spike-sha3/sha3/sha3.mk.in
+0 −1 isa-sim/spike-sha3/softfloat
+0 −1 isa-sim/spike-sha3/spike_main
+0 −1 isa-sim/spike-sha3/tests
+5 −6 software/README.md
+0 −5 software/build.sh
+0 −1 software/marshal-configs/sha3-bare-rocc.json
+0 −1 software/marshal-configs/sha3-bare-sw.json
+0 −1 software/marshal-configs/sha3-linux.json
2 changes: 1 addition & 1 deletion toolchains/esp-tools/riscv-gnu-toolchain
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Submodule riscv-gnu-toolchain updated 33 files
+8 −0 .github/setup-apt.sh
+49 −0 .github/workflows/build.yaml
+178 −0 .github/workflows/nightly-release.yaml
+0 −54 .travis.yml
+221 −67 Makefile.in
+143 −27 README.md
+215 −13 configure
+68 −9 configure.ac
+31 −0 contrib/Vagrantfile
+1 −1 riscv-binutils
+11 −7 scripts/testsuite-filter
+6 −0 scripts/wrapper/make_stderr_tail
+1 −0 scripts/wrapper/spike/riscv32-unknown-elf-run
+1 −0 scripts/wrapper/spike/riscv32-unknown-linux-gnu-run
+1 −0 scripts/wrapper/spike/riscv64-unknown-elf-run
+7 −0 scripts/wrapper/spike/riscv64-unknown-linux-gnu-run
+4 −4 test/allowlist/README.md
+0 −0 test/allowlist/binutils/common.log
+0 −0 test/allowlist/binutils/glibc.log
+15 −0 test/allowlist/binutils/newlib.log
+14 −0 test/allowlist/gcc/common.log
+0 −0 test/allowlist/gcc/glibc.ilp32.log
+0 −0 test/allowlist/gcc/glibc.log
+0 −0 test/allowlist/gcc/glibc.lp64.log
+0 −0 test/allowlist/gcc/glibc.rv32.f.log
+0 −0 test/allowlist/gcc/glibc.rv32.log
+0 −0 test/allowlist/gcc/lp64.log
+4 −0 test/allowlist/gcc/newlib-nano.f.log
+34 −0 test/allowlist/gcc/newlib-nano.log
+1 −0 test/allowlist/gcc/newlib.log
+0 −0 test/allowlist/gcc/rv64.log
+0 −9 test/whitelist/binutils/newlib.log
+0 −14 test/whitelist/gcc/newlib-nano.log
2 changes: 1 addition & 1 deletion toolchains/esp-tools/riscv-isa-sim
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Submodule riscv-isa-sim updated 951 files
2 changes: 1 addition & 1 deletion toolchains/esp-tools/riscv-pk
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Submodule riscv-pk updated from a3e4ac to e8e6b3
2 changes: 1 addition & 1 deletion toolchains/esp-tools/riscv-tests
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Submodule riscv-tests updated 78 files
+6 −1 benchmarks/Makefile
+1 −0 benchmarks/common/test.ld
+24 −10 benchmarks/pmp/pmp.c
+3 −3 debug/Makefile
+2 −1 debug/README.md
+369 −21 debug/gdbserver.py
+2 −0 debug/programs/debug.c
+73 −0 debug/programs/semihosting.c
+82 −0 debug/programs/semihosting.h
+159 −0 debug/programs/vectors.S
+39 −1 debug/targets.py
+2 −0 debug/targets/RISC-V/spike-1.cfg
+10 −3 debug/targets/RISC-V/spike-2-hwthread.cfg
+10 −6 debug/targets/RISC-V/spike-2.cfg
+0 −27 debug/targets/RISC-V/spike-rtos.cfg
+1 −0 debug/targets/RISC-V/spike32-2-hwthread.py
+0 −17 debug/targets/RISC-V/spike32-2-rtos.py
+2 −0 debug/targets/RISC-V/spike32.py
+1 −0 debug/targets/RISC-V/spike64-2-hwthread.py
+3 −0 debug/targets/RISC-V/spike64-2-rtos.py
+4 −1 debug/targets/RISC-V/spike64-2.py
+1 −0 debug/targets/RISC-V/spike64.py
+3 −0 debug/targets/SiFive/HiFiveUnleashed-flash.py
+1 −0 debug/targets/SiFive/HiFiveUnleashed.cfg
+3 −0 debug/targets/SiFive/HiFiveUnleashed.py
+37 −10 debug/testlib.py
+1 −1 env
+15 −2 isa/Makefile
+73 −0 isa/macros/scalar/test_macros.h
+0 −2 isa/rv32mi/Makefrag
+1 −0 isa/rv32mi/shamt.S
+0 −2 isa/rv32si/Makefrag
+0 −2 isa/rv32ua/Makefrag
+0 −2 isa/rv32uc/Makefrag
+0 −2 isa/rv32ud/Makefrag
+0 −2 isa/rv32uf/Makefrag
+0 −2 isa/rv32ui/Makefrag
+0 −2 isa/rv32um/Makefrag
+10 −0 isa/rv32uzfh/Makefrag
+7 −0 isa/rv32uzfh/fadd.S
+7 −0 isa/rv32uzfh/fclass.S
+7 −0 isa/rv32uzfh/fcmp.S
+7 −0 isa/rv32uzfh/fcvt.S
+7 −0 isa/rv32uzfh/fcvt_w.S
+7 −0 isa/rv32uzfh/fdiv.S
+7 −0 isa/rv32uzfh/fmadd.S
+7 −0 isa/rv32uzfh/fmin.S
+38 −0 isa/rv32uzfh/ldst.S
+7 −0 isa/rv32uzfh/move.S
+7 −0 isa/rv32uzfh/recoding.S
+0 −2 isa/rv64mi/Makefrag
+0 −18 isa/rv64mi/illegal.S
+1 −1 isa/rv64mi/mcsr.S
+0 −2 isa/rv64si/Makefrag
+1 −0 isa/rv64si/csr.S
+0 −2 isa/rv64ua/Makefrag
+14 −8 isa/rv64ua/lrsc.S
+0 −2 isa/rv64uc/Makefrag
+4 −0 isa/rv64ud/Makefrag
+13 −11 isa/rv64ud/structural.S
+4 −0 isa/rv64uf/Makefrag
+4 −0 isa/rv64ui/Makefrag
+4 −4 isa/rv64ui/fence_i.S
+4 −0 isa/rv64um/Makefrag
+3 −3 isa/rv64uv/Makefrag
+0 −0 isa/rv64uv/vsetvlh.S
+10 −0 isa/rv64uzfh/Makefrag
+44 −0 isa/rv64uzfh/fadd.S
+44 −0 isa/rv64uzfh/fclass.S
+37 −0 isa/rv64uzfh/fcmp.S
+49 −0 isa/rv64uzfh/fcvt.S
+104 −0 isa/rv64uzfh/fcvt_w.S
+41 −0 isa/rv64uzfh/fdiv.S
+45 −0 isa/rv64uzfh/fmadd.S
+54 −0 isa/rv64uzfh/fmin.S
+38 −0 isa/rv64uzfh/ldst.S
+58 −0 isa/rv64uzfh/move.S
+46 −0 isa/rv64uzfh/recoding.S
2 changes: 1 addition & 1 deletion toolchains/riscv-tools/riscv-gnu-toolchain
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Submodule riscv-gnu-toolchain updated from 2855d8 to 88b004
2 changes: 1 addition & 1 deletion toolchains/riscv-tools/riscv-isa-sim
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Submodule riscv-isa-sim updated from acd953 to bf4b1e
2 changes: 1 addition & 1 deletion toolchains/riscv-tools/riscv-pk
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Submodule riscv-pk updated from a3e4ac to e8e6b3
2 changes: 1 addition & 1 deletion toolchains/riscv-tools/riscv-tests
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Submodule riscv-tests updated from 19bfda to 1ce128