Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Sane FireSim Default Target Freqs #836

Merged
merged 9 commits into from
Jun 8, 2021
Merged

Sane FireSim Default Target Freqs #836

merged 9 commits into from
Jun 8, 2021

Conversation

alonamid
Copy link
Contributor

Related issue: N/A

Type of change: other enhancement

Impact: rtl change

Release Notes
Update FireSim default frequencies for better tile/system/memory ratios.

This PR changes the default FireSim target tile frequency from 3.2 GHz to 2 GHz (with a memory bus of 1 GHz), because 3.2 GHz generates an unrealistic Tile/Memory cycles ratio.
The default configs are also updated with a slower system bus (1 GHz).

The PR also adds two additional packaged config tweaks which are representative of High-Perf (Legacy) target configs, and test-chip target configs (1 GHz tile instead of 2 GHz).

  • Upon approval, need to generate new pre-built AGFIs.

@colinschmidt
Copy link
Contributor

I think the new configs should be:
FireSimReasonablePerf: 2GHz(tile):1GHz(system/memory):500MHz(pbus)
TestChip:1GHz(tile):500MHz(sys/mem):250MHz(pbus)

@davidbiancolin
Copy link
Contributor

While I'd love to see the pbus running a slower frequency than the sbus, unless there have been some recent changes in RC, that design point probably won't function correctly without further modification. IIRC RTC handling expects that SBUS and PBUS are running at the same freq.

@alonamid alonamid requested a review from davidbiancolin June 4, 2021 22:20
// Crossing specifications
new chipyard.config.WithCbusToPbusCrossingType(AsynchronousCrossing()) ++ // Add Async crossing between PBUS and CBUS
new chipyard.config.WithSbusToMbusCrossingType(AsynchronousCrossing()) ++ // Add Async crossings between backside of L2 and MBUS
new freechips.rocketchip.subsystem.WithAsynchronousRocketTiles(4,4) ++ // Add Async crossings between RocketTile and uncore
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Am i mistaken, but weren't these rational earlier in the PR? They definitely should be.

Copy link
Contributor

@davidbiancolin davidbiancolin left a comment

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

LGTM

@alonamid alonamid merged commit 76b747d into dev Jun 8, 2021
@jerryz123 jerryz123 deleted the firesim-default-freqs branch October 1, 2022 02:10
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

Successfully merging this pull request may close these issues.

5 participants