arm64: bitwise, bit shift, boolean SIMD instructions

Makefile

@@ -117,10 +117,10 @@ spectest:
 	@$(MAKE) spectest.v2
 
 spectest.v1:
-	go test $$(go list ./... | grep $(spectest_v1_dir)) -v -timeout 120s
+	@go test $$(go list ./... | grep $(spectest_v1_dir)) -timeout 120s
 
 spectest.v2:
-	go test $$(go list ./... | grep $(spectest_v2_dir)) -v -timeout 120s
+	@go test $$(go list ./... | grep $(spectest_v2_dir)) -timeout 120s
 
 golangci_lint_path := $(shell go env GOPATH)/bin/golangci-lint
 

internal/asm/arm64/assembler.go

@@ -107,12 +107,23 @@ type Assembler interface {
 
 	// CompileVectorRegisterToVectorRegisterWithConst is the same as CompileVectorRegisterToVectorRegister but the
 	// additional constant can be provided.
-	// For example, the const can be used to specify the shift amount for USHLL instruction.
+	// For example, the const can be used to specify the shift amount for USHLLIMM instruction.
 	CompileVectorRegisterToVectorRegisterWithConst(instruction asm.Instruction, srcReg, dstReg asm.Register,
 		arrangement VectorArrangement, c asm.ConstantValue)
 
 	// CompileLoadStaticConstToVectorRegister adds an instruction where the source operand is StaticConstant located in
 	// the memory and the destination is the dstReg.
 	CompileLoadStaticConstToVectorRegister(instruction asm.Instruction, c asm.StaticConst, dstReg asm.Register,
 		arrangement VectorArrangement)
+
+	// CompileTwoVectorRegistersToVectorRegister adds an instruction where source are two vectors and destination is one
+	// vector. The vector's arrangement can be specified `arrangement`.
+	CompileTwoVectorRegistersToVectorRegister(instruction asm.Instruction, srcReg, srcReg2, dstReg asm.Register,
+		arrangement VectorArrangement)
+
+	// CompileTwoVectorRegistersToVectorRegisterWithConst is the same as CompileTwoVectorRegistersToVectorRegister except
+	// that this also accept additional constant.
+	// For example EXIT instruction needs the extraction target immediate as const.
+	CompileTwoVectorRegistersToVectorRegisterWithConst(instruction asm.Instruction, srcReg, srcReg2, dstReg asm.Register,
+		arrangement VectorArrangement, c asm.ConstantValue)
 }