Rename 2ch-16bit-16khz to 2ch-32bit-8khz.

sigrokproject/libsigrokdecode#6 (comment)
sigrokproject · Apr 30, 2019 · c7692e1 · c7692e1
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diff --git a/...it-16khz/2ch-16bit-16khz-no-samplerate.sr → ...2bit-8khz/2ch-32bit-8khz-no-samplerate.sr b/...it-16khz/2ch-16bit-16khz-no-samplerate.sr → ...2bit-8khz/2ch-32bit-8khz-no-samplerate.sr
diff --git a/i2s/2ch-16bit-16khz/2ch-16bit-16khz.sr → i2s/2ch-32bit-8khz/2ch-32bit-8khz.sr b/i2s/2ch-16bit-16khz/2ch-16bit-16khz.sr → i2s/2ch-32bit-8khz/2ch-32bit-8khz.sr
diff --git a/i2s/2ch-16bit-16khz/README → i2s/2ch-32bit-8khz/README b/i2s/2ch-16bit-16khz/README → i2s/2ch-32bit-8khz/README
@@ -1,10 +1,11 @@
 -------------------------------------------------------------------------------
-I2S Master 2-channel 16-bit 16-kHz
+I2S Master 2-channel 32-bit 8-kHz
 -------------------------------------------------------------------------------
 
 This is an example of an I2S master playing a recording of the BBC
 shipping forecast through one channel, and the other channel disconnected.
 
+
 Logic analyzer setup
 --------------------
 
@@ -15,4 +16,3 @@ The logic analyzer used was an EE Electronics ESLA201A (at 12MHz):
   0           Clock
   1           Frame Select
   2           Data
-