Added nop after every ld

riscv-test-suite/rv32i_m/F/src/fmul_b9-01.S

@@ -30,6 +30,7 @@ RVTEST_CODE_BEGIN
 #ifdef TEST_CASE_1
 
 RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmul_b9)
+RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fmul_b9)
 
 RVTEST_FP_ENABLE()
 RVTEST_VALBASEUPD(x3,test_dataset_0)

riscv-test-suite/rv64i_m/pmp64/pmp64-CSR-access.S

@@ -57,14 +57,23 @@ main:
 	RVTEST_SIGUPD(x13,a4)		// Storing into signature file
 	.set pmpaddri, pmpaddri+1		// increment variable pmpaddri to the next pmpaddr reg
 	.endr			// END OF LOOP BODY
+// WRITING pmpaddr in M-mode /////////////////////////////////////////
+	LI(a4,0x01)			// RANDOM VALUE
+	.set pmpaddri, PMPADDR0		// Initialize an iterating variable with the address of pmpaddr0
+	.rept 16			// START OF LOOP
+	csrw pmpaddri, a4		// WRITING pmpaddri (i is from 0-15)
+	nop				// Added nop in case of trap
+	RVTEST_SIGUPD(x13,a4)		// Storing into signature file
+	.set pmpaddri, pmpaddri+1		// increment variable pmpaddri to the next pmpaddr reg
+	.endr			// END OF LOOP BODY
 // WRITING pmpcfg registers //////////////////////////////////////////
 // Write in M-mode will be valid, Write in other modes will cause trap
 	LI(a5, PMP_R| PMP_W | PMP_X | PMP_TOR)	// LOCKED BIT IS NOT SET
 	// Loop to Write ALL pmpcfg regs
 	.set pmpcfgi, PMPCFG0	// Initialize an iterating variable with the address of pmpcfg0
 	.rept 2			// START OF LOOP
-	csrw pmpcfgi, a5			// Write pmpcfgi
-	nop					// Added nop in case of trap
+	csrw pmpcfgi, a5	// Write pmpcfgi
+	nop			// Added nop in case of trap
 	.set pmpcfgi, pmpcfgi+2		// increment variable to next pmpcfg reg	
 	.endr			// END OF LOOP BODY
 //////////////// VERIFICATION /////////////////////////////////////////
@@ -93,13 +102,43 @@ main:
 // REPEATING THE SAME TEST //////////////////////////////////////////		
 // IN Smode now
 /////////////////// TEST 01 ////////////////////////////////////////////
-// WRITING pmpaddr registers //////////////////////////////////////////
-// Write in M-mode will be valid, Write in other modes will cause trap  	
-	csrw pmpaddr0, x2		// Write pmpaddr0 in S mode (TRAP)
-	nop				// Added nop in case of trap
 // READING pmpaddr in S-mode /////////////////////////////////////////
-	csrr a4, pmpaddr0		// Reading pmpaddr0 in S mode (TRAP)
+	.set pmpaddri, PMPADDR0		// Initialize an iterating variable with the address of pmpaddr0
+	.rept 4			// START OF LOOP
+	csrr a4, pmpaddri		// READING pmpaddri (i is from 0-15)
+	nop				// Added nop in case of trap
+	RVTEST_SIGUPD(x13,a4)		// Storing into signature file
+	.set pmpaddri, pmpaddri+1		// increment variable pmpaddri to the next pmpaddr reg
+	.endr			// END OF LOOP BODY
+// WRITING pmpaddr in S-mode /////////////////////////////////////////
+	LI(a4,0x01)			// RANDOM VALUE
+	.set pmpaddri, PMPADDR0		// Initialize an iterating variable with the address of pmpaddr0
+	.rept 4			// START OF LOOP
+	csrw pmpaddri, a4		// WRITING pmpaddri (i is from 0-15)
+	nop				// Added nop in case of trap
+	RVTEST_SIGUPD(x13,a4)		// Storing into signature file
+	.set pmpaddri, pmpaddri+1		// increment variable pmpaddri to the next pmpaddr reg
+	.endr			// END OF LOOP BODY
+// WRITING pmpcfg registers //////////////////////////////////////////
+// Write in M-mode will be valid, Write in other modes will cause trap
+	LI(a5, PMP_R| PMP_W | PMP_X | PMP_TOR)	// LOCKED BIT IS NOT SET
+	// Loop to Write ALL pmpcfg regs
+	.set pmpcfgi, PMPCFG0	// Initialize an iterating variable with the address of pmpcfg0
+	.rept 2			// START OF LOOP
+	csrw pmpcfgi, a5	// Write pmpcfgi
+	nop			// Added nop in case of trap
+	.set pmpcfgi, pmpcfgi+2		// increment variable to next pmpcfg reg	
+	.endr			// END OF LOOP BODY
+//////////////// VERIFICATION /////////////////////////////////////////
+// READING pmpcfg in S-mode /////////////////////////////////////////
+	// Loop to verify the contents of pmpcfg regs
+	.set pmpcfgi, PMPCFG0		// Initialize an iterating variable with the address of pmpcfg0
+	.rept 2				// START OF LOOP
+	csrr a4, pmpcfg0		// Read pmpcfg0
 	nop				// Added nop in case of trap
+	RVTEST_SIGUPD(x13,a4)
+	.set pmpcfgi, pmpcfgi+2		// increment variable to next pmpcfg reg	
+	.endr			// END OF LOOP BODY
 /////////////////// Switch back to M-mode ////////////////////////////////////////////
 	RVTEST_GOTO_MMODE
   	csrr a4, mstatus		// VERIFICATION of M-mode
@@ -121,15 +160,43 @@ main:
 	RVTEST_GOTO_LOWER_MODE	Umode	
 // REPEATING THE SAME TEST //////////////////////////////////////////		
 // IN U-mode now
-/////////////////// TEST 01 ////////////////////////////////////////////
-// WRITING pmpaddr registers //////////////////////////////////////////
-// Write in M-mode will be valid, Write in other modes will cause trap  	
-	csrw pmpaddr0, x2		// Write pmpaddr0 in u mode (TRAP)
+// READING pmpaddr in U-mode /////////////////////////////////////////
+	.set pmpaddri, PMPADDR0		// Initialize an iterating variable with the address of pmpaddr0
+	.rept 4				// START OF LOOP
+	csrr a4, pmpaddri		// READING pmpaddri (i is from 0-15)
 	nop				// Added nop in case of trap
+	RVTEST_SIGUPD(x13,a4)		// Storing into signature file
+	.set pmpaddri, pmpaddri+1		// increment variable pmpaddri to the next pmpaddr reg
+	.endr			// END OF LOOP BODY
+// WRITING pmpaddr in U-mode /////////////////////////////////////////
+	LI(a4,0x01)			// RANDOM VALUE
+	.set pmpaddri, PMPADDR0		// Initialize an iterating variable with the address of pmpaddr0
+	.rept 4			// START OF LOOP
+	csrw pmpaddri, a4		// WRITING pmpaddri (i is from 0-15)
+	nop				// Added nop in case of trap
+	RVTEST_SIGUPD(x13,a4)		// Storing into signature file
+	.set pmpaddri, pmpaddri+1		// increment variable pmpaddri to the next pmpaddr reg
+	.endr			// END OF LOOP BODY
+// WRITING pmpcfg registers //////////////////////////////////////////
+// Write in M-mode will be valid, Write in other modes will cause trap
+	LI(a5, PMP_R| PMP_W | PMP_X | PMP_TOR)	// LOCKED BIT IS NOT SET
+	// Loop to Write ALL pmpcfg regs
+	.set pmpcfgi, PMPCFG0	// Initialize an iterating variable with the address of pmpcfg0
+	.rept 2			// START OF LOOP
+	csrw pmpcfgi, a5	// Write pmpcfgi
+	nop			// Added nop in case of trap
+	.set pmpcfgi, pmpcfgi+2		// increment variable to next pmpcfg reg	
+	.endr			// END OF LOOP BODY
 //////////////// VERIFICATION /////////////////////////////////////////
-// READING pmpaddr in S-mode /////////////////////////////////////////
-	csrr a4, pmpaddr0		// Reading pmpaddr0 in U mode (TRAP)
+// READING pmpcfg in U-mode /////////////////////////////////////////
+	// Loop to verify the contents of pmpcfg regs
+	.set pmpcfgi, PMPCFG0		// Initialize an iterating variable with the address of pmpcfg0
+	.rept 2				// START OF LOOP
+	csrr a4, pmpcfg0		// Read pmpcfg0
 	nop				// Added nop in case of trap
+	RVTEST_SIGUPD(x13,a4)
+	.set pmpcfgi, pmpcfgi+2		// increment variable to next pmpcfg reg	
+	.endr			// END OF LOOP BODY
 
 #endif
 
@@ -161,7 +228,7 @@ signature_x13_1:
 tsig_begin_canary:
 CANARY;
 mtrap_sigptr:
-    .fill 64*(XLEN/32),4,0xdeadbeef
+    .fill 256*(XLEN/32),4,0xdeadbeef
 tsig_end_canary:
 CANARY;
 

riscv-test-suite/rv64i_m/pmp64/pmp64-NA4-R-priority-level-2.S

@@ -49,7 +49,8 @@ RVTEST_SIGBASE( x13,signature_x13_1)
 	nop
 	nop
 	ld	a4,0(a5)	// Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY)
-	jal	\ADDRESS	// Test for execution, an instruction is placed at this address 
+	nop
+jal	\ADDRESS	// Test for execution, an instruction is placed at this address 
 .endm
 
 main:

riscv-test-suite/rv64i_m/pmp64/pmp64-NA4-R-priority.S

@@ -51,7 +51,8 @@ RVTEST_SIGBASE( x13,signature_x13_1)
 	nop
 	nop
 	ld	a4,0(a5)	// Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY)
-	jal	\ADDRESS	// Test for execution, an instruction is placed at this address 
+	nop
+jal	\ADDRESS	// Test for execution, an instruction is placed at this address 
 .endm
 
 main:

riscv-test-suite/rv64i_m/pmp64/pmp64-NA4-R.S

@@ -53,7 +53,8 @@ RVTEST_SIGBASE( x13,signature_x13_1)
 	nop
 	nop
 	ld	a4,0(a5)	// Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY)
-	jal	\ADDRESS	// Test for execution, an instruction is placed at this address 
+	nop
+jal	\ADDRESS	// Test for execution, an instruction is placed at this address 
 .endm
 
 main:

riscv-test-suite/rv64i_m/pmp64/pmp64-NA4-RW-priority-level-2.S

@@ -49,7 +49,8 @@ RVTEST_SIGBASE( x13,signature_x13_1)
 	nop
 	nop
 	ld	a4,0(a5)	// Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY)
-	jal	\ADDRESS	// Test for execution, an instruction is placed at this address 
+	nop
+jal	\ADDRESS	// Test for execution, an instruction is placed at this address 
 .endm
 
 main:

riscv-test-suite/rv64i_m/pmp64/pmp64-NA4-RW-priority.S

@@ -50,7 +50,8 @@ RVTEST_SIGBASE( x13,signature_x13_1)
 	nop
 	nop
 	ld	a4,0(a5)	// Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY)
-	jal	\ADDRESS	// Test for execution, an instruction is placed at this address 
+	nop
+jal	\ADDRESS	// Test for execution, an instruction is placed at this address 
 .endm
 
 main:

riscv-test-suite/rv64i_m/pmp64/pmp64-NA4-RW.S

@@ -55,7 +55,8 @@ RVTEST_SIGBASE( x13,signature_x13_1)
 	nop
 	nop
 	ld	a4,0(a5)	// Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY)
-	jal	\ADDRESS	// Test for execution, an instruction is placed at this address 
+	nop
+jal	\ADDRESS	// Test for execution, an instruction is placed at this address 
 .endm
 
 main:

riscv-test-suite/rv64i_m/pmp64/pmp64-NA4-RWX.S

@@ -53,7 +53,8 @@ RVTEST_SIGBASE( x13,signature_x13_1)
 	nop
 	nop
 	ld	a4,0(a5)	// Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY)
-	jal	\ADDRESS	// Test for execution, an instruction is placed at this address 
+	nop
+jal	\ADDRESS	// Test for execution, an instruction is placed at this address 
 .endm
 
 main:

riscv-test-suite/rv64i_m/pmp64/pmp64-NA4-RX-priority-level-2.S

@@ -49,7 +49,8 @@ RVTEST_SIGBASE( x13,signature_x13_1)
 	nop
 	nop
 	ld	a4,0(a5)	// Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY)
-	jal	\ADDRESS	// Test for execution, an instruction is placed at this address 
+	nop
+jal	\ADDRESS	// Test for execution, an instruction is placed at this address 
 .endm
 
 main:

riscv-test-suite/rv64i_m/pmp64/pmp64-NA4-RX-priority.S

@@ -50,7 +50,8 @@ RVTEST_SIGBASE( x13,signature_x13_1)
 	nop
 	nop
 	ld	a4,0(a5)	// Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY)
-	jal	\ADDRESS	// Test for execution, an instruction is placed at this address 
+	nop
+jal	\ADDRESS	// Test for execution, an instruction is placed at this address 
 .endm
 
 main:

riscv-test-suite/rv64i_m/pmp64/pmp64-NA4-RX.S

@@ -53,7 +53,8 @@ RVTEST_SIGBASE( x13,signature_x13_1)
 	nop
 	nop
 	ld	a4,0(a5)	// Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY)
-	jal	\ADDRESS	// Test for execution, an instruction is placed at this address 
+	nop
+jal	\ADDRESS	// Test for execution, an instruction is placed at this address 
 .endm
 
 main:

riscv-test-suite/rv64i_m/pmp64/pmp64-NA4-X-priority-level-2.S

@@ -49,7 +49,8 @@ RVTEST_SIGBASE( x13,signature_x13_1)
 	nop
 	nop
 	ld	a4,0(a5)	// Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY)
-	jal	\ADDRESS	// Test for execution, an instruction is placed at this address 
+	nop
+jal	\ADDRESS	// Test for execution, an instruction is placed at this address 
 .endm
 
 main:

riscv-test-suite/rv64i_m/pmp64/pmp64-NA4-X-priority.S

@@ -50,7 +50,8 @@ RVTEST_SIGBASE( x13,signature_x13_1)
 	nop
 	nop
 	ld	a4,0(a5)	// Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY)
-	jal	\ADDRESS	// Test for execution, an instruction is placed at this address 
+	nop
+jal	\ADDRESS	// Test for execution, an instruction is placed at this address 
 .endm
 
 main:

riscv-test-suite/rv64i_m/pmp64/pmp64-NA4-X.S

@@ -53,7 +53,8 @@ RVTEST_SIGBASE( x13,signature_x13_1)
 	nop
 	nop
 	ld	a4,0(a5)	// Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY)
-	jal	\ADDRESS	// Test for execution, an instruction is placed at this address 
+	nop
+jal	\ADDRESS	// Test for execution, an instruction is placed at this address 
 .endm
 
 main:

riscv-test-suite/rv64i_m/pmp64/pmp64-NAPOT-R-priority-level-2.S

@@ -49,7 +49,8 @@ RVTEST_SIGBASE( x13,signature_x13_1)
 	nop
 	nop
 	ld	a4,0(a5)	// Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY)
-	jal	\ADDRESS	// Test for execution, an instruction is placed at this address 
+	nop
+jal	\ADDRESS	// Test for execution, an instruction is placed at this address 
 .endm
 
 main:

riscv-test-suite/rv64i_m/pmp64/pmp64-NAPOT-R-priority.S

@@ -50,7 +50,8 @@ RVTEST_SIGBASE( x13,signature_x13_1)
 	nop
 	nop
 	ld	a4,0(a5)	// Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY)
-	jal	\ADDRESS	// Test for execution, an instruction is placed at this address 
+	nop
+jal	\ADDRESS	// Test for execution, an instruction is placed at this address 
 .endm
 
 main:

riscv-test-suite/rv64i_m/pmp64/pmp64-NAPOT-R.S

@@ -54,6 +54,7 @@ RVTEST_SIGBASE( x13,signature_x13_1)
 	nop
 	nop
 	ld	a4,0(a5)	// Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY)
+	nop
 	jal	\ADDRESS	// Test for execution, an instruction is placed at this address 
 .endm
 

riscv-test-suite/rv64i_m/pmp64/pmp64-NAPOT-RW-priority-level-2.S

@@ -49,7 +49,8 @@ RVTEST_SIGBASE( x13,signature_x13_1)
 	nop
 	nop
 	ld	a4,0(a5)	// Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY)
-	jal	\ADDRESS	// Test for execution, an instruction is placed at this address 
+	nop
+jal	\ADDRESS	// Test for execution, an instruction is placed at this address 
 .endm
 
 main:

riscv-test-suite/rv64i_m/pmp64/pmp64-NAPOT-RW-priority.S

@@ -50,7 +50,8 @@ RVTEST_SIGBASE( x13,signature_x13_1)
 	nop
 	nop
 	ld	a4,0(a5)	// Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY)
-	jal	\ADDRESS	// Test for execution, an instruction is placed at this address 
+	nop
+jal	\ADDRESS	// Test for execution, an instruction is placed at this address 
 .endm
 
 main:

riscv-test-suite/rv64i_m/pmp64/pmp64-NAPOT-RW.S

@@ -54,7 +54,8 @@ RVTEST_SIGBASE( x13,signature_x13_1)
 	nop
 	nop
 	ld	a4,0(a5)	// Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY)
-	jal	\ADDRESS	// Test for execution, an instruction is placed at this address 
+	nop
+jal	\ADDRESS	// Test for execution, an instruction is placed at this address 
 .endm
 
 main:

riscv-test-suite/rv64i_m/pmp64/pmp64-NAPOT-RWX.S

@@ -54,7 +54,8 @@ RVTEST_SIGBASE( x13,signature_x13_1)
 	nop
 	nop
 	ld	a4,0(a5)	// Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY)
-	jal	\ADDRESS	// Test for execution, an instruction is placed at this address 
+	nop
+jal	\ADDRESS	// Test for execution, an instruction is placed at this address 
 .endm
 
 main:

riscv-test-suite/rv64i_m/pmp64/pmp64-NAPOT-RX-priority-level-2.S

@@ -49,7 +49,8 @@ RVTEST_SIGBASE( x13,signature_x13_1)
 	nop
 	nop
 	ld	a4,0(a5)	// Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY)
-	jal	\ADDRESS	// Test for execution, an instruction is placed at this address 
+	nop
+jal	\ADDRESS	// Test for execution, an instruction is placed at this address 
 .endm
 
 main:

riscv-test-suite/rv64i_m/pmp64/pmp64-NAPOT-RX-priority.S

@@ -50,7 +50,8 @@ RVTEST_SIGBASE( x13,signature_x13_1)
 	nop
 	nop
 	ld	a4,0(a5)	// Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY)
-	jal	\ADDRESS	// Test for execution, an instruction is placed at this address 
+	nop
+jal	\ADDRESS	// Test for execution, an instruction is placed at this address 
 .endm
 
 main:

riscv-test-suite/rv64i_m/pmp64/pmp64-NAPOT-RX.S

@@ -54,7 +54,8 @@ RVTEST_SIGBASE( x13,signature_x13_1)
 	nop
 	nop
 	ld	a4,0(a5)	// Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY)
-	jal	\ADDRESS	// Test for execution, an instruction is placed at this address 
+	nop
+jal	\ADDRESS	// Test for execution, an instruction is placed at this address 
 .endm
 
 main:

riscv-test-suite/rv64i_m/pmp64/pmp64-NAPOT-X-priority-level-2.S

@@ -49,7 +49,8 @@ RVTEST_SIGBASE( x13,signature_x13_1)
 	nop
 	nop
 	ld	a4,0(a5)	// Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY)
-	jal	\ADDRESS	// Test for execution, an instruction is placed at this address 
+	nop
+jal	\ADDRESS	// Test for execution, an instruction is placed at this address 
 .endm
 
 main:

riscv-test-suite/rv64i_m/pmp64/pmp64-NAPOT-X-priority.S

@@ -50,7 +50,8 @@ RVTEST_SIGBASE( x13,signature_x13_1)
 	nop
 	nop
 	ld	a4,0(a5)	// Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY)
-	jal	\ADDRESS	// Test for execution, an instruction is placed at this address 
+	nop
+jal	\ADDRESS	// Test for execution, an instruction is placed at this address 
 .endm
 
 main:

riscv-test-suite/rv64i_m/pmp64/pmp64-NAPOT-X.S

@@ -54,7 +54,8 @@ RVTEST_SIGBASE( x13,signature_x13_1)
 	nop
 	nop
 	ld	a4,0(a5)	// Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY)
-	jal	\ADDRESS	// Test for execution, an instruction is placed at this address 
+	nop
+jal	\ADDRESS	// Test for execution, an instruction is placed at this address 
 .endm
 
 main: