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Crypto Hardware Formatting and Simplification #663

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Mar 11, 2024
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2c6588d
Timinig optimization for radix 4 division, added missing derived config
davidharrishmc Mar 6, 2024
eb87a4a
UM comments in fdivsqrtotfc
davidharrishmc Mar 6, 2024
93455e8
Added arch64i tests for fp configs
davidharrishmc Mar 11, 2024
39ca709
Merged AES changes
davidharrishmc Mar 11, 2024
34058dd
Crypto formatting cleanup
davidharrishmc Mar 11, 2024
e4724b8
Crypto formatting cleanup
davidharrishmc Mar 11, 2024
ea6846f
Crypto commenting cleanup
davidharrishmc Mar 11, 2024
955c131
Crypto rename inputs and outputs to a and y
davidharrishmc Mar 11, 2024
d0dd308
ZK simplification
davidharrishmc Mar 11, 2024
837abf1
ZK simplifcations
davidharrishmc Mar 11, 2024
2580d37
ZK cleanup, check no LLEN > XLEN without D$, add half and quad float …
davidharrishmc Mar 11, 2024
9a1fdba
Added more Zbkb tests shared with Zbb
davidharrishmc Mar 11, 2024
3d72cca
AES simplification
davidharrishmc Mar 11, 2024
f72e504
Defined rotate module and formatted AES modules more densely
davidharrishmc Mar 11, 2024
f950067
Shared middle and final round aes32 to cut size 50%
davidharrishmc Mar 11, 2024
b53e873
shared hardware for AES 64 decode
davidharrishmc Mar 11, 2024
d22306a
Shared haredware for aes64e
davidharrishmc Mar 11, 2024
7ee3145
Simplified muxing for AES64
davidharrishmc Mar 11, 2024
5257d3d
AES64 cleanup
davidharrishmc Mar 11, 2024
ef89679
Optimized out aes64im hardware; sharing with aes64d
davidharrishmc Mar 11, 2024
87ed778
Starting to merge decrypt and encrypt for AES64
davidharrishmc Mar 11, 2024
7d87c4f
AES64 simplification
davidharrishmc Mar 11, 2024
64d7f77
AES64 simplification
davidharrishmc Mar 11, 2024
b7f5ce6
AES64 simplification
davidharrishmc Mar 11, 2024
39c0d0c
AES64 simplification
davidharrishmc Mar 11, 2024
10d1ff6
Merged ZKNDEResult into a single BMU result mux input
davidharrishmc Mar 11, 2024
a714904
Simplifying AES32 logic
davidharrishmc Mar 11, 2024
8af25a4
AES32 sharing logic
davidharrishmc Mar 11, 2024
096f409
Final cleanup tonight
davidharrishmc Mar 11, 2024
019458a
Shared sbox between aes64ks1i and aes64e
davidharrishmc Mar 11, 2024
dbfe44a
Renamed aes and sha directories
davidharrishmc Mar 11, 2024
7132d30
Simplified ZKNH64
davidharrishmc Mar 11, 2024
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Defined rotate module and formatted AES modules more densely
davidharrishmc committed Mar 11, 2024
commit f72e5048dec574dc2406eafb318715c7e192b7cc
35 changes: 35 additions & 0 deletions src/ieu/aes_common/rotate.sv
Original file line number Diff line number Diff line change
@@ -0,0 +1,35 @@
///////////////////////////////////////////
// rotate.sv
//
// Written: [email protected], [email protected]
// Created: 20 February 2024
//
// Purpose: rotate a by shamt
//
// A component of the CORE-V-WALLY configurable RISC-V project.
// https://github.com/openhwgroup/cvw
//
// Copyright (C) 2021-24 Harvey Mudd College & Oklahoma State University
//
// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
//
// Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file
// except in compliance with the License, or, at your option, the Apache License version 2.0. You
// may obtain a copy of the License at
//
// https://solderpad.org/licenses/SHL-2.1/
//
// Unless required by applicable law or agreed to in writing, any work distributed under the
// License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
// either express or implied. See the License for the specific language governing permissions
// and limitations under the License.
////////////////////////////////////////////////////////////////////////////////////////////////

module rotate #(parameter WIDTH=32) (
input logic [WIDTH-1:0] a,
input logic [$clog2(WIDTH)-1:0] shamt,
output logic [WIDTH-1:0] y
);

assign y = (a << shamt) | (a >> (WIDTH-shamt));
endmodule
12 changes: 6 additions & 6 deletions src/ieu/aes_instructions/aes32dsi.sv
Original file line number Diff line number Diff line change
@@ -36,10 +36,10 @@ module aes32dsi(
logic [7:0] SboxIn, SboxOut;
logic [31:0] so, sorotate;

assign shamt = {bs, 3'b0}; // shamt = bs * 8 (convert bytes to bits)
assign SboxIn = rs2[shamt +: 8]; // Shift rs2 right by shamt and take the lower byte
aesinvsbox inv_sbox(SboxIn, SboxOut); // Apply inverse sbox
assign so = {24'h0, SboxOut}; // Pad output of inverse substitution box
assign sorotate = (so << shamt) | (so >> (32 - shamt)); // Rotate the substitution box output left by shamt (bs * 8)
assign DataOut = rs1 ^ sorotate; // Set result to "X(rs1)[31..0] ^ rol32(so, unsigned(shamt));"
assign shamt = {bs, 3'b0}; // shamt = bs * 8 (convert bytes to bits)
assign SboxIn = rs2[shamt +: 8]; // select byte bs of rs2
aesinvsbox inv_sbox(SboxIn, SboxOut); // Apply inverse sbox
assign so = {24'h0, SboxOut}; // Pad output of inverse substitution box
rotate sorot(so, shamt, sorotate); // Rotate the substitution box output left by shamt (bs * 8)
assign DataOut = rs1 ^ sorotate; // xor with running value
endmodule
34 changes: 9 additions & 25 deletions src/ieu/aes_instructions/aes32dsmi.sv
Original file line number Diff line number Diff line change
@@ -33,30 +33,14 @@ module aes32dsmi(
);

logic [4:0] shamt;
logic [7:0] SboxIn;
logic [7:0] SboxOut;
logic [31:0] so;
logic [31:0] mixed;
logic [31:0] mixedrotate;
logic [7:0] SboxIn, SboxOut;
logic [31:0] so, mixed, mixedrotate;

// shamt = bs * 8
assign shamt = {bs, 3'b0};

// Shift rs2 right by shamt and take the lower byte
assign SboxIn = rs2[shamt +: 8]; // Shift rs2 right by shamt and take the lower byte

// Apply inverse sbox to si
aesinvsbox inv_sbox(SboxIn, SboxOut);

// Pad output of inverse substitution box
assign so = {24'h0, SboxOut};

// Run so through the mixword AES function
aesinvmixcolumns mix(so, mixed);

// Rotate the substitution box output left by shamt (bs * 8)
assign mixedrotate = (mixed << shamt) | (mixed >> (32 - shamt));

// Set result to "X(rs1)[31..0] ^ rol32(so, unsigned(shamt));"
assign DataOut = rs1 ^ mixedrotate;
assign shamt = {bs, 3'b0}; // shamt = bs * 8 (convert bytes to bits)
assign SboxIn = rs2[shamt +: 8]; // select byte bs of rs2
aesinvsbox inv_sbox(SboxIn, SboxOut); // Apply inverse sbox to si
assign so = {24'h0, SboxOut}; // Pad output of inverse substitution box
aesinvmixcolumns mix(so, mixed); // Run so through the mixword AES function
rotate mrot(mixed, shamt, mixedrotate); // Rotate the mixcolumns output left by shamt (bs * 8)
assign DataOut = rs1 ^ mixedrotate; // xor with running value
endmodule
28 changes: 8 additions & 20 deletions src/ieu/aes_instructions/aes32esi.sv
Original file line number Diff line number Diff line change
@@ -33,25 +33,13 @@ module aes32esi(
);

logic [4:0] shamt;
logic [7:0] SboxIn;
logic [7:0] SboxOut;
logic [31:0] so;
logic [31:0] sorotate;
logic [7:0] SboxIn, SboxOut;
logic [31:0] so, sorotate;

// Shift bs by 3 to get shamt
assign shamt = {bs, 3'b0};

assign SboxIn = rs2[shamt +: 8]; // Shift rs2 right by shamt and take the lower byte

// Substitute
aessbox subbox(SboxIn, SboxOut);

// Pad sbox output
assign so = {24'h0, SboxOut};

// Rotate so left by shamt
assign sorotate = (so << shamt) | (so >> (32 - shamt));

// Set result X(rs1)[31..0] ^ rol32(so, unsigned(shamt));
assign DataOut = rs1 ^ sorotate;
assign shamt = {bs, 3'b0}; // shamt = bs * 8 (convert bytes to bits)
assign SboxIn = rs2[shamt +: 8]; // select byte bs of rs2
aessbox subbox(SboxIn, SboxOut); // Substitute
assign so = {24'h0, SboxOut}; // Pad sbox output
rotate sorot(so, shamt, sorotate); // Rotate the substitution box output left by shamt (bs * 8)
assign DataOut = rs1 ^ sorotate; // xor with running value
endmodule
33 changes: 9 additions & 24 deletions src/ieu/aes_instructions/aes32esmi.sv
Original file line number Diff line number Diff line change
@@ -33,29 +33,14 @@ module aes32esmi(
);

logic [4:0] shamt;
logic [7:0] SboxIn;
logic [7:0] SboxOut;
logic [31:0] so;
logic [31:0] mixed;
logic [31:0] mixedrotate;
logic [7:0] SboxIn, SboxOut;
logic [31:0] so, mixed, mixedrotate;

// Shift bs by 3 to get shamt
assign shamt = {bs, 3'b0};

assign SboxIn = rs2[shamt +: 8]; // Shift rs2 right by shamt and take the lower byte

// Substitute
aessbox sbox(SboxIn, SboxOut);

// Pad sbox output
assign so = {24'h0, SboxOut};

// Mix Word using aesmixword component
aesmixcolumns mwd(so, mixed);

// Rotate so left by shamt
assign mixedrotate = (mixed << shamt) | (mixed >> (32 - shamt));

// Set result X(rs1)[31..0] ^ rol32(mixed, unsigned(shamt));
assign DataOut = rs1 ^ mixedrotate;
assign shamt = {bs, 3'b0}; // shamt = bs * 8 (convert bytes to bits)
assign SboxIn = rs2[shamt +: 8]; // select byte bs of rs2
aessbox sbox(SboxIn, SboxOut); // Substitute
assign so = {24'h0, SboxOut}; // Pad sbox output
aesmixcolumns mwd(so, mixed); // Mix Word using aesmixword component
rotate mrot(mixed, shamt, mixedrotate); // Rotate the mixcolumns output left by shamt (bs * 8)
assign DataOut = rs1 ^ mixedrotate; // xor with running value
endmodule
31 changes: 9 additions & 22 deletions src/ieu/aes_instructions/aes64ks1i.sv
Original file line number Diff line number Diff line change
@@ -31,30 +31,17 @@ module aes64ks1i(
output logic [63:0] rd
);

logic [7:0] rconPreShift;
logic [31:0] rcon;
logic lastRoundFlag;
logic [31:0] rs1Rotate;
logic [31:0] tmp2;
logic [31:0] SboxOut;
logic [7:0] rcon8;
logic [31:0] rcon, rs1Rotate, tmp2, SboxOut;

// Get rcon value from table
rconlut128 rc(roundnum, rconPreShift);

// Shift RCON value
assign rcon = {24'b0, rconPreShift};

// Flag will be set if roundnum = 0xA = 0b1010
assign lastRoundFlag = roundnum[3] & ~roundnum[2] & roundnum[1] & ~roundnum[0];

// Get rotated value fo ruse in tmp2
assign rs1Rotate = {rs1[39:32], rs1[63:40]};

// Assign tmp2 to a mux based on lastRoundFlag
assign tmp2 = lastRoundFlag ? rs1[63:32] : rs1Rotate;

// Substitute bytes of value obtained for tmp2 using Rijndael sbox
aessboxword sbox(tmp2, SboxOut);

rconlut128 rc(roundnum, rcon8); // Get rcon value from lookup table
assign rcon = {24'b0, rcon8}; // Zero-pad RCON
assign rs1Rotate = {rs1[39:32], rs1[63:40]}; // Get rotated value fo ruse in tmp2
assign lastRoundFlag = (roundnum == 4'b1010); // round 10 is the last one
assign tmp2 = lastRoundFlag ? rs1[63:32] : rs1Rotate; // Don't rotate on the last round
aessboxword sbox(tmp2, SboxOut); // Substitute bytes of value obtained for tmp2 using Rijndael sbox
assign rd[31:0] = SboxOut ^ rcon;
assign rd[63:32] = SboxOut ^ rcon;
endmodule
1 change: 0 additions & 1 deletion src/ieu/bmu/bitmanipalu.sv
Original file line number Diff line number Diff line change
@@ -56,7 +56,6 @@ module bitmanipalu import cvw::*; #(parameter cvw_t P) (
logic [P.XLEN-1:0] ZKNHResult; // ZKNH Result
logic [P.XLEN-1:0] MaskB; // BitMask of B
logic [P.XLEN-1:0] RevA; // Bit-reversed A
logic Rotate; // Indicates if it is Rotate instruction
logic Mask; // Indicates if it is ZBS instruction
logic PreShift; // Inidicates if it is sh1add, sh2add, sh3add instruction
logic [1:0] PreShiftAmt; // Amount to Pre-Shift A