[test-triage] chip_sw_aes_masking_off fails after AES RTL changes #22917
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vogelpi
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The input masks are now taken from the PRNG buffer stage. This means after loading the magic seed into the PRNG and having the PRNG output the all-zero vector, the buffer stage needs to be updated as well. This can be achieved by triggering via a clearing operation of the data output registers. This resolves lowRISC#22917. 22917Signed-off-by: Pirmin Vogel <[email protected]> Signed-off-by: Pirmin Vogel <[email protected]>
vogelpi
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The input masks are now taken from the PRNG buffer stage. This means after loading the magic seed into the PRNG and having the PRNG output the all-zero vector, the buffer stage needs to be updated as well. This can be achieved by triggering via a clearing operation of the data output registers. This resolves lowRISC#22917. Signed-off-by: Pirmin Vogel <[email protected]>
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I've now filed a PR to get this test going again, see #22930. |
vogelpi
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The input masks are now taken from the PRNG buffer stage. This means after loading the magic seed into the PRNG and having the PRNG output the all-zero vector, the buffer stage needs to be updated as well. This can be achieved by triggering via a clearing operation of the data output registers. This resolves lowRISC#22917. Signed-off-by: Pirmin Vogel <[email protected]>
vogelpi
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The input masks are now taken from the PRNG buffer stage. This means after loading the magic seed into the PRNG and having the PRNG output the all-zero vector, the buffer stage needs to be updated as well. This can be achieved by triggering via a clearing operation of the data output registers. This resolves #22917. Signed-off-by: Pirmin Vogel <[email protected]>
sameo
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The input masks are now taken from the PRNG buffer stage. This means after loading the magic seed into the PRNG and having the PRNG output the all-zero vector, the buffer stage needs to be updated as well. This can be achieved by triggering via a clearing operation of the data output registers. This resolves lowRISC#22917. Signed-off-by: Pirmin Vogel <[email protected]>
sameo
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Jun 10, 2024
The input masks are now taken from the PRNG buffer stage. This means after loading the magic seed into the PRNG and having the PRNG output the all-zero vector, the buffer stage needs to be updated as well. This can be achieved by triggering via a clearing operation of the data output registers. This resolves lowRISC#22917. Signed-off-by: Pirmin Vogel <[email protected]>
sameo
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Jun 10, 2024
The input masks are now taken from the PRNG buffer stage. This means after loading the magic seed into the PRNG and having the PRNG output the all-zero vector, the buffer stage needs to be updated as well. This can be achieved by triggering via a clearing operation of the data output registers. This resolves lowRISC#22917. Signed-off-by: Pirmin Vogel <[email protected]>
sameo
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Jun 10, 2024
The input masks are now taken from the PRNG buffer stage. This means after loading the magic seed into the PRNG and having the PRNG output the all-zero vector, the buffer stage needs to be updated as well. This can be achieved by triggering via a clearing operation of the data output registers. This resolves lowRISC#22917. Signed-off-by: Pirmin Vogel <[email protected]>
jadephilipoom
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Jun 17, 2024
The input masks are now taken from the PRNG buffer stage. This means after loading the magic seed into the PRNG and having the PRNG output the all-zero vector, the buffer stage needs to be updated as well. This can be achieved by triggering via a clearing operation of the data output registers. This resolves lowRISC#22917. Signed-off-by: Pirmin Vogel <[email protected]>
jadephilipoom
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Jun 17, 2024
The input masks are now taken from the PRNG buffer stage. This means after loading the magic seed into the PRNG and having the PRNG output the all-zero vector, the buffer stage needs to be updated as well. This can be achieved by triggering via a clearing operation of the data output registers. This resolves lowRISC#22917. Signed-off-by: Pirmin Vogel <[email protected]>
sameo
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Jun 17, 2024
The input masks are now taken from the PRNG buffer stage. This means after loading the magic seed into the PRNG and having the PRNG output the all-zero vector, the buffer stage needs to be updated as well. This can be achieved by triggering via a clearing operation of the data output registers. This resolves lowRISC#22917. Signed-off-by: Pirmin Vogel <[email protected]>
sameo
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Jun 17, 2024
The input masks are now taken from the PRNG buffer stage. This means after loading the magic seed into the PRNG and having the PRNG output the all-zero vector, the buffer stage needs to be updated as well. This can be achieved by triggering via a clearing operation of the data output registers. This resolves lowRISC#22917. Signed-off-by: Pirmin Vogel <[email protected]>
sameo
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Jun 18, 2024
The input masks are now taken from the PRNG buffer stage. This means after loading the magic seed into the PRNG and having the PRNG output the all-zero vector, the buffer stage needs to be updated as well. This can be achieved by triggering via a clearing operation of the data output registers. This resolves lowRISC#22917. Signed-off-by: Pirmin Vogel <[email protected]>
sameo
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Jun 18, 2024
The input masks are now taken from the PRNG buffer stage. This means after loading the magic seed into the PRNG and having the PRNG output the all-zero vector, the buffer stage needs to be updated as well. This can be achieved by triggering via a clearing operation of the data output registers. This resolves lowRISC#22917. Signed-off-by: Pirmin Vogel <[email protected]>
sameo
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Jun 19, 2024
The input masks are now taken from the PRNG buffer stage. This means after loading the magic seed into the PRNG and having the PRNG output the all-zero vector, the buffer stage needs to be updated as well. This can be achieved by triggering via a clearing operation of the data output registers. This resolves lowRISC#22917. Signed-off-by: Pirmin Vogel <[email protected]>
sameo
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Jun 19, 2024
The input masks are now taken from the PRNG buffer stage. This means after loading the magic seed into the PRNG and having the PRNG output the all-zero vector, the buffer stage needs to be updated as well. This can be achieved by triggering via a clearing operation of the data output registers. This resolves lowRISC#22917. Signed-off-by: Pirmin Vogel <[email protected]>
sameo
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Jun 27, 2024
The input masks are now taken from the PRNG buffer stage. This means after loading the magic seed into the PRNG and having the PRNG output the all-zero vector, the buffer stage needs to be updated as well. This can be achieved by triggering via a clearing operation of the data output registers. This resolves lowRISC#22917. Signed-off-by: Pirmin Vogel <[email protected]>
andreaskurth
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Jun 27, 2024
The input masks are now taken from the PRNG buffer stage. This means after loading the magic seed into the PRNG and having the PRNG output the all-zero vector, the buffer stage needs to be updated as well. This can be achieved by triggering via a clearing operation of the data output registers. This resolves #22917. Signed-off-by: Pirmin Vogel <[email protected]>
AlexJones0
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Jul 8, 2024
The input masks are now taken from the PRNG buffer stage. This means after loading the magic seed into the PRNG and having the PRNG output the all-zero vector, the buffer stage needs to be updated as well. This can be achieved by triggering via a clearing operation of the data output registers. This resolves lowRISC#22917. Signed-off-by: Pirmin Vogel <[email protected]>
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Hierarchy of regression failure
Block level
Failure Description
UVM_FATAL @ 3321.421894 us: (chip_sw_aes_masking_off_vseq.sv:162) [uvm_test_top.env.virtual_sequencer.chip_sw_aes_masking_off_vseq] Check failed state_init_share1 == '0 (261008556511606517935595337728332530022 [0xc45c6b6290143840c51c1bbea8020166] vs 0 [0x0]) Share 1 of the input not equal zero.
There's also a TL-UL failing assertion:
../src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv", 301: tb.dut.top_earlgrey.u_xbar_main.tlul_assert_host_rv_core_ibex__cored.gen_assert_final[1].noOutstandingReqsAtEndOfSim_A: started at 3321421894ps failed at 3321421894ps
Offending '((pend_req[1].pend == 1'b0) || $test$plusargs("disable_assert_final_checks"))'
UVM_ERROR @ 3321.421894 us: (tlul_assert.sv:301) [ASSERT FAILED] noOutstandingReqsAtEndOfSim_A
Steps to Reproduce
./util/dvsim/dvsim.py hw/top_earlgrey/dv/chip_sim_cfg.hjson -i chip_sw_aes_masking_off --build-seed 29629349767786988748941369645310183062873507656225682712521573681396210883738 --fixed-seed 50872679030684457411525866978198029813162651732304102301881216380340976679238
Tests with similar or related failures
Fixed Seed
62014364074305549766088787075294037528818904623409476815904894661659903874324was also failingThe text was updated successfully, but these errors were encountered: