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perf: keep min and max referenced offsets during run (#1080)
* WIP * WIP * WIP * WIP * WIP * WIP * WIP * WIP * WIP * WIP * WIP * WIP * WIP * WIP * Fix trace * WIP * Revert "WIP" This reverts commit eae76bb92a33de5dd5f488a08efe18b91846b2dd. * test: remove no longer relevant tests * Fix missing reassignment of cache * Cleanup and correctness * chore: changelog * refactor: don't return Result --------- Co-authored-by: Pedro Fontana <[email protected]> Co-authored-by: Tomá <[email protected]>
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -1,114 +1,16 @@ | ||
use core::ops::Shl; | ||
|
||
use self::trace_entry::TraceEntry; | ||
use super::{ | ||
decoding::decoder::decode_instruction, errors::vm_errors::VirtualMachineError, | ||
vm_memory::memory::Memory, | ||
}; | ||
use num_traits::ToPrimitive; | ||
|
||
pub mod trace_entry; | ||
const OFFSET_BITS: u32 = 16; | ||
/// Return the minimum and maximum values in the perm_range_check component. | ||
pub fn get_perm_range_check_limits( | ||
trace: &[TraceEntry], | ||
memory: &Memory, | ||
) -> Result<Option<(isize, isize)>, VirtualMachineError> { | ||
trace | ||
.iter() | ||
.try_fold(None, |offsets: Option<(isize, isize)>, trace| { | ||
let instruction = memory.get_integer((0, trace.pc).into())?; | ||
let instruction = instruction | ||
.to_u64() | ||
.ok_or(VirtualMachineError::InvalidInstructionEncoding)?; | ||
|
||
let decoded_instruction = decode_instruction(instruction)?; | ||
let off0 = decoded_instruction.off0 + 1_isize.shl(OFFSET_BITS - 1); | ||
let off1 = decoded_instruction.off1 + 1_isize.shl(OFFSET_BITS - 1); | ||
let off2 = decoded_instruction.off2 + 1_isize.shl(OFFSET_BITS - 1); | ||
|
||
let min_value = off0.min(off1).min(off2); | ||
let max_value = off0.max(off1).max(off2); | ||
Ok( | ||
offsets.map_or(Some((min_value, max_value)), |(min_offset, max_offset)| { | ||
Some((min_offset.min(min_value), max_offset.max(max_value))) | ||
}), | ||
) | ||
}) | ||
} | ||
|
||
#[cfg(test)] | ||
mod test { | ||
use super::*; | ||
use crate::utils::test_utils::*; | ||
use assert_matches::assert_matches; | ||
|
||
#[cfg(target_arch = "wasm32")] | ||
use wasm_bindgen_test::*; | ||
|
||
/// Test that get_perm_range_check_limits() works as intended with an empty | ||
/// trace. | ||
#[test] | ||
#[cfg_attr(target_arch = "wasm32", wasm_bindgen_test)] | ||
fn get_perm_range_check_limits_empty_trace() { | ||
let trace = &[]; | ||
let memory = Memory::new(); | ||
|
||
assert_matches!(get_perm_range_check_limits(trace, &memory), Ok(None)); | ||
} | ||
|
||
/// Test that get_perm_range_check_limits() works as intended with a single | ||
/// trace element. | ||
#[test] | ||
#[cfg_attr(target_arch = "wasm32", wasm_bindgen_test)] | ||
fn get_perm_range_check_limits_single_element() { | ||
let trace = &[TraceEntry { | ||
pc: 0, | ||
ap: 0, | ||
fp: 0, | ||
}]; | ||
|
||
let memory = memory![((0, 0), 0xFFFF_8000_0000_u64)]; | ||
// off0 -32768 | ||
// off1 0 | ||
// off2 32767 | ||
assert_matches!( | ||
get_perm_range_check_limits(trace, &memory), | ||
Ok(Some((0, 65535))) | ||
); | ||
} | ||
|
||
/// Test that get_perm_range_check_limits() works as intended with multiple | ||
/// trace elements. | ||
#[test] | ||
#[cfg_attr(target_arch = "wasm32", wasm_bindgen_test)] | ||
fn get_perm_range_check_limits_multiple_elements() { | ||
let trace = &[ | ||
TraceEntry { | ||
pc: 0, | ||
ap: 0, | ||
fp: 0, | ||
}, | ||
TraceEntry { | ||
pc: 1, | ||
ap: 0, | ||
fp: 0, | ||
}, | ||
TraceEntry { | ||
pc: 2, | ||
ap: 0, | ||
fp: 0, | ||
}, | ||
]; | ||
let memory = memory![ | ||
((0, 0), 0x80FF_8000_0530_u64), | ||
((0, 1), 0xBFFF_8000_0620u64), | ||
((0, 2), 0x8FFF_8000_0750u64) | ||
]; | ||
|
||
assert_matches!( | ||
get_perm_range_check_limits(trace, &memory), | ||
Ok(Some((1328, 49151))) | ||
); | ||
pub mod trace_entry { | ||
use serde::{Deserialize, Serialize}; | ||
|
||
///A trace entry for every instruction that was executed. | ||
///Holds the register values before the instruction was executed. | ||
/// Before relocation: | ||
/// Register values are represented as their offsets, as their indexes will always be 0,1,1 respectively | ||
/// The index of the last pc will not be equal to 0, but it is not appended to the trace | ||
/// After relocation the value of each register will be a single integer | ||
#[derive(Debug, PartialEq, Eq, Deserialize, Serialize)] | ||
pub struct TraceEntry { | ||
pub pc: usize, | ||
pub ap: usize, | ||
pub fp: usize, | ||
} | ||
} |
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4221723
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Possible performance regression was detected for benchmark.
Benchmark result of this commit is worse than the previous benchmark result exceeding threshold
1.30
.add_u64_with_felt/0
1
ns/iter (± 0
)0
ns/iter (± 0
)Infinity
add_u64_with_felt/1
4
ns/iter (± 0
)2
ns/iter (± 0
)2
add_u64_with_felt/2
4
ns/iter (± 0
)2
ns/iter (± 0
)2
add_u64_with_felt/3
2
ns/iter (± 0
)1
ns/iter (± 0
)2
add_u64_with_felt/4
2
ns/iter (± 0
)1
ns/iter (± 0
)2
add_u64_with_felt/5
2
ns/iter (± 0
)1
ns/iter (± 0
)2
add_u64_with_felt/6
4
ns/iter (± 0
)2
ns/iter (± 0
)2
add_u64_with_felt/7
4
ns/iter (± 0
)2
ns/iter (± 0
)2
add_u64_with_felt/8
3
ns/iter (± 0
)2
ns/iter (± 0
)1.50
This comment was automatically generated by workflow using github-action-benchmark.
CC: @unbalancedparentheses