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Yosys-tetris project

Originally "yafpgatetris" project by johan92

This fork is an adaptation of original tetris for Yosys open synthesis framework

yosys-tetris wiki pages

To run this project:

Expected compilation results

  • Yosys compilation log will be stored as yosys.log in project root directory
  • Generated vqm netlist will be stored in project root directory in case of sucessful compile (we don't got it yet)
  • after getting vqm netlist please open yosys-tetris.qpf project in latest Intel Quartus Lite software and launch compilation
  • resulting sof file is suitable for Intel Cyclone V chip, part number 5CGXFC7C7F23C8

Current project status

Current project status is described on https://github.com/genrnd/yosys-tetris/wiki/Project-status wiki page

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Yet Another Tetris on FPGA Implementation

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