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v0.10.0-esp32-20210721

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@igrr igrr released this 21 Jul 18:08
· 3734 commits to master since this release

2021/07/21 Release, based on OpenOCD v0.10.0

Features:

  • esp32s3: Added base support for the latest ESP32-S3 chip revision. It includes base debugging support w/o flash support and other features.
  • tcl/esp32s3: Added esp_get_mac support for ESP32-S3.
  • esp32c3: Added separate target for ESP32-C3 chip. Now ESP32-C3 has its own target implemented basing on RISCV one. Thsi allows to keep ESP32-C3 specific features in separate module and minimize modification to base RISCV target.
  • esp/apptrace/esp32c3: Added application level tracing support for ESP32-C3.
  • algorithm/esp32c3: Added support for running algorithms on ESP32-C3.
  • flash/esp32c3: Added flash support for ESP32-C3 (#165).
  • riscv: Added command to mask IRQ during stepping. Implemented ARM-like command to control how IRQs are controlled during stepping. Currently to modes are supported: off and steponly.
  • riscv: Implemented batch JTAG ops for memory read. Combined JTAG operations into batches to speed up memory reads.
  • riscv: Emulated 8-/16-bit memory access via SBA using 32-bit read/write. SBA mode allows to access memory on running target. When 8-/16-bit memory accesses via SBA are not supported they are emulated via 32-bit ones if it is possible.
  • loaders/esp: Added encrypted flash support for esp32, esp32s2 and esp32c3.
  • loaders/esp: Added command to enable/disable CPU clock boosting when flasher stub is running on target. This allows to increase flash programing speed significantly.
  • loaders/esp: Enable by default CPU clock boosting when programming via program_esp. Clock can be restored after flashing when restore_clock option is specified.
  • loaders/esp: Added command esp verify_bank_hash to verify flash uploads using sha256 hash.
  • esp: Added Espressif USB JTAG/serial debug unit and USB Bridge udev rules.
  • esp: Added release binaries signing for MacOS.

Bug fixes:

  • riscv: Disabled watchpoints on stepping to avoid watchpoint re-triggering.
  • tcl/esp: Added check for flash support before running program_esp to provide clearer error reasoning for users (#165 (comment)).
  • freertos: Made threads list updating tolerant to list reading errors.
  • target/riscv: Added get_gdb_arch target API implementation to avoid GDB errors when riscv arch is not exactly specifed (#144 (comment)).
  • esp32c3: Call rtos post_reset_cleanup method after reset to clear RTOS data (#144).
  • riscv: Avoided increasing dmi_busy_delay due to garbage data received by dmi_scan during chip reset. Thsi allows to avoid unnecessary and abnormal increasin of dmi_busy_delay leading to quite slow JTAG communication after several target resets.
  • esp/apptrace: Added target connection status check while polling for apptrace data (#149). This allows to avoid apptrace data losing due to target reset.
  • target/{esp32s2,esp32s3,esp32c3}: Disabled SWD on reset or halt (#153).
  • jtag_esp_remote: Added several fixes of the ESP Remote protocol JTAG driver.
  • esp_usb_jtag: Fixed stack overflow. This prevents OpenOCD crashing or stucking in infinite loop when started w/o connected device.
  • esp: Fixed files paths typo in boards description file.