[release/5.0] Fix logic to test bits in a constant vector (Vector256)

src/coreclr/src/jit/lower.h

@@ -348,6 +348,28 @@ class Lowering final : public Phase
         double   f64[4];
     };
 
+    //----------------------------------------------------------------------------------------------
+    // VectorConstantIsBroadcastedI64: Check N i64 elements in a constant vector for equality
+    //
+    //  Arguments:
+    //     vecCns  - Constant vector
+    //     count   - Amount of i64 components to compare
+    //
+    //  Returns:
+    //     true if N i64 elements of the given vector are equal
+    static bool VectorConstantIsBroadcastedI64(VectorConstant& vecCns, int count)
+    {
+        assert(count >= 1 && count <= 4);
+        for (int i = 1; i < count; i++)
+        {
+            if (vecCns.i64[i] != vecCns.i64[0])
+            {
+                return false;
+            }
+        }
+        return true;
+    }
+
     //----------------------------------------------------------------------------------------------
     // ProcessArgForHWIntrinsicCreate: Processes an argument for the Lowering::LowerHWIntrinsicCreate method
     //

src/coreclr/src/jit/lowerarmarch.cpp

@@ -969,25 +969,23 @@ void Lowering::LowerHWIntrinsicCreate(GenTreeHWIntrinsic* node)
 
         assert((simdSize == 8) || (simdSize == 16));
 
-        if ((argCnt == 1) || (simdSize == 8) || (vecCns.i64[0] == vecCns.i64[1]))
+        if (VectorConstantIsBroadcastedI64(vecCns, simdSize / 8))
         {
             // If we are a single constant or if all parts are the same, we might be able to optimize
             // this even further for certain values, such as Zero or AllBitsSet.
 
             if (vecCns.i64[0] == 0)
             {
-                node->gtOp1 = nullptr;
-                node->gtOp2 = nullptr;
-
-                node->gtHWIntrinsicId = NI_Vector128_get_Zero;
+                node->gtOp1           = nullptr;
+                node->gtOp2           = nullptr;
+                node->gtHWIntrinsicId = (simdSize == 8) ? NI_Vector64_get_Zero : NI_Vector128_get_Zero;
                 return;
             }
             else if (vecCns.i64[0] == -1)
             {
-                node->gtOp1 = nullptr;
-                node->gtOp2 = nullptr;
-
-                node->gtHWIntrinsicId = NI_Vector128_get_AllBitsSet;
+                node->gtOp1           = nullptr;
+                node->gtOp2           = nullptr;
+                node->gtHWIntrinsicId = (simdSize == 8) ? NI_Vector64_get_AllBitsSet : NI_Vector128_get_AllBitsSet;
                 return;
             }
         }

src/coreclr/src/jit/lowerxarch.cpp

@@ -1516,26 +1516,23 @@ void Lowering::LowerHWIntrinsicCreate(GenTreeHWIntrinsic* node)
 
         assert((simdSize == 8) || (simdSize == 12) || (simdSize == 16) || (simdSize == 32));
 
-        if ((argCnt == 1) ||
-            ((vecCns.i64[0] == vecCns.i64[1]) && ((simdSize <= 16) || (vecCns.i64[2] == vecCns.i64[3]))))
+        if (((simdSize == 16) || (simdSize == 32)) && VectorConstantIsBroadcastedI64(vecCns, simdSize / 8))
         {
             // If we are a single constant or if all parts are the same, we might be able to optimize
             // this even further for certain values, such as Zero or AllBitsSet.
 
             if (vecCns.i64[0] == 0)
             {
-                node->gtOp1 = nullptr;
-                node->gtOp2 = nullptr;
-
-                node->gtHWIntrinsicId = NI_Vector128_get_Zero;
+                node->gtOp1           = nullptr;
+                node->gtOp2           = nullptr;
+                node->gtHWIntrinsicId = (simdSize == 16) ? NI_Vector128_get_Zero : NI_Vector256_get_Zero;
                 return;
             }
             else if (vecCns.i64[0] == -1)
             {
-                node->gtOp1 = nullptr;
-                node->gtOp2 = nullptr;
-
-                node->gtHWIntrinsicId = NI_Vector128_get_AllBitsSet;
+                node->gtOp1           = nullptr;
+                node->gtOp2           = nullptr;
+                node->gtHWIntrinsicId = (simdSize == 16) ? NI_Vector128_get_AllBitsSet : NI_Vector256_get_AllBitsSet;
                 return;
             }
         }

src/coreclr/tests/issues.targets

@@ -955,6 +955,9 @@
         <ExcludeList Include="$(XunitTestBinBase)/JIT/HardwareIntrinsics/General/Regression/GitHub_43569/**">
             <Issue>https://github.com/dotnet/runtime/issues/43676</Issue>
         </ExcludeList>
+        <ExcludeList Include="$(XunitTestBinBase)/JIT/HardwareIntrinsics/General/Regression/GitHub_47236/**">
+            <Issue>https://github.com/dotnet/runtime/issues/43676</Issue>
+        </ExcludeList>
         <ExcludeList Include="$(XunitTestBinBase)/baseservices/TieredCompilation/BasicTestWithMcj/*">
             <Issue>Tests features specific to coreclr</Issue>
         </ExcludeList>