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ARM64-SVE: Add AddRotateComplex
, MultiplyAddRotateComplex
#104926
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Note regarding the
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1 similar comment
Note regarding the
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Tagging subscribers to this area: @JulieLeeMSFT, @jakobbotsch |
{ | ||
for (int i = 0; i < op1.Length; i += 2) | ||
{ | ||
if (rot == 0) |
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likewise here - from https://developer.arm.com/architectures/instruction-sets/intrinsics/svcadd[_f64]_m
can we use real
and img
and then calculate the result to make it clear.
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seems this is missed.
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Looks much better overall now, added some minor comments.
case 4: | ||
assert(intrinEmbMask.op4 != nullptr); | ||
assert(HWIntrinsicInfo::HasImmediateOperand(intrinEmbMask.id)); | ||
FALLTHROUGH; |
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can you also save embMaskOp4Reg
and then later, check if it is REG_NA
because it was contained?
No need for assert(HWIntrinsicInfo::HasImmediateOperand(intrinEmbMask.id));
at this point.
case 3: | ||
case 4: |
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hhm, any reason why we are combining 3 and 4? This can lead to accidently not handling things correctly in future.
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If the intent is to share the following code, then we should extract it out I think in a common method and call it for case 3 and 4.
if (intrin.op2->IsVectorZero())
{
...
}
else
{
...
}
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That was my intent; I'll do that
{ | ||
for (int i = 0; i < op1.Length; i += 2) | ||
{ | ||
if (rot == 0) |
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seems this is missed.
@kunalspathak thanks for the review! Stress tests are still passing. |
case NI_Sve_ShiftRightArithmeticForDivide: | ||
assert(embHasImmediateOperand); | ||
assert(numArgs == 2); | ||
if (!embOp2Node->Op(2)->isContainedIntOrIImmed()) |
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nit for future PR - we can have bool needInternalRegister
that gets set and then after the switch-case just check and do buildInternalIntRegisterDefForNode(embOp2Node);
if it is true.
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That sounds better -- I'll include that in my next PR.
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LGTM. Thanks!
Part of #99957. Based on discussion with Tanner here, we decided the
rotation
value should be passed in its encoded form (0, 1, etc.) rather than as an angle to simplify the JIT's implementation; in the future API review round, we'll changerotation
to be an enum to simplify the API's usage. This meant I had to tweak the emitter and its corresponding SVE unit tests. I reran them, and after disabling a few unit tests that are NYI, they all emit without hitting any asserts.I also tweaked
_SveImmBinaryOpTestTemplate.template
and_SveImmTernOpTestTemplate.template
while I was here to address #104804 and #104809, since relatively few tests use these templates. For the APIs using these templates, including the newly-added ones, the stress tests are passing.@dotnet/arm64-contrib PTAL, thanks!