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Wrong Marshal.SizeOf on CoreRT #8274
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EDIT: Actually, nevermind that, it seems i can't read diff's the right way around, got ported in #8222 |
Thank you for reporting this. #8275 has the fix. |
Awesome, that was swift! I'll give it a go whenever I can afford the time to build a local compiler instance. |
An updated NuGet package should be out within a day. |
Apart from the size, what was the effect of this bug? |
The layout of the marshalled view of the struct was wrong. It means both size and offsets of individual members were wrong. |
Confirmed working, thanks! I guess that means another MonoGame game shipping with CoreRT. |
Awesome! Are you at liberty to say which one and which platform? |
https://store.steampowered.com/app/1037020/ScourgeBringer/ It currently runs on .Net Core 3.1 but the next update will ship with CoreRT on Windows, macOS, and Linux. |
* Fix alignment of marshaled inline arrays (dotnet#8275) Fixes dotnet#8274 * Correct flags for allocating in RhpNewFastMisalign. Add fast path (dotnet#8277) * add switch case for LPUTF8Str in array element (dotnet#8278) * Wasm: Add support for DefaultConstructorOf and hence Activator.CreateInstance<T> (dotnet#8279) * Wasm: upgrade emscripten for an llvm and exception fixes. (dotnet#8281) * upgrade emscripten for some llvm and exception fixes. Correct retrieval of exception from landing pad. end c++ exception when catch found. * Update ILToWebAssemblyImporter.cs remove cut/past comment * Wasm: add support for new StackTrace().ToString() (dotnet#8201) * wasm add rethrow support (dotnet#8206) * Wasm: add support for overflow checks on signed and unsigned ints multiply (dotnet#8259) * wasm-ovf-unsigned-int * refactor for stack kind tests and add signed check * use llvm intrinsics * Wasm: bring add and sub overflow operations in line with mul (dotnet#8284) * Support for ARM64 on UNIX like systems compiler and runtime (dotnet#8271) * CoreRT-ARM64: Helper node asm code generation * CoreRT ARM64: Add additional relocation support * CoreRT ARM64: Use alternative functions for write Barriers On ARM the Jit uses a special register interface for to call the write barrier functions. But as the regular once still used in other places we need two different implementations. The helper nodes need to call the custom variants * ARM64 code generation * unwind use only the dwarf index option * ARM64 runtime assembler functions * ARM64 unix stack walk * ARM64 Exception Handling * ARM64: Fix EH data decoding * Move native layout signature from read only to data section on non Windows target * Fix exception handling macro call * ARM64 thunk helpers * ARM64 process cfi data for elf * ARM64 missing assembler macro * ARM64 port more assembler helpers * ARM64: Add missing case for the generic helper node * ARM64 intrinsic support * ARM64 object writer for ELF object files * ARM64 llvm patches for object writer * ARM64 include untested helper code with debug break * ARM64 reenable scanning fail exception * ARM64 Fix wrong function call for invoke return * ARM64: Ensure module fixup node data is aligned Data is updated with a compare exchange operation. Therefore it needs to be aligned or it will trigger a data exception on ARM64 CPUs * Wasm fix LLVM Debug Information subroutine linkage (dotnet#8288) * wasm - reinstate llvm debug subroutine linkage Co-authored-by: Jan Kotas <[email protected]> Co-authored-by: yowl <[email protected]>
* Arm64 (#5) * CoreRT-ARM64: Helper node asm code generation * CoreRT ARM64: Add additional relocation support * CoreRT ARM64: Use alternative functions for write Barriers On ARM the Jit uses a special register interface for to call the write barrier functions. But as the regular once still used in other places we need two different implemenations. The helper nodes need to call the custom variants * ARM64 code generation * unwind use only the dwarf index option * ARM64 runtime assembler functions * ARM64 unix stack walk * ARM64 Exception Handling * ARM64: Fix EH data decodeing * Move nattive layout signature from read only to data section on non Windows target * Fix exception handling macro call * ARM64 thunk helpers * ARM64 process cfi data for elf * ARM64 missing assembler macro * ARM64 port more assembler helpers * ARM64: Add missing case for the gemeric helper node * ARM64 intrinsic support * ARM64 object writer for ELF object files * ARM64 llvm patches for object writer * ARM64 include untested helper code with debug break * ARM64 reenable scanning fail exception * Arm64 (#6) * CoreRT-ARM64: Helper node asm code generation * CoreRT ARM64: Add additional relocation support * CoreRT ARM64: Use alternative functions for write Barriers On ARM the Jit uses a special register interface for to call the write barrier functions. But as the regular once still used in other places we need two different implemenations. The helper nodes need to call the custom variants * ARM64 code generation * unwind use only the dwarf index option * ARM64 runtime assembler functions * ARM64 unix stack walk * ARM64 Exception Handling * ARM64: Fix EH data decodeing * Move nattive layout signature from read only to data section on non Windows target * Fix exception handling macro call * ARM64 thunk helpers * ARM64 process cfi data for elf * ARM64 missing assembler macro * ARM64 port more assembler helpers * ARM64: Add missing case for the gemeric helper node * ARM64 intrinsic support * ARM64 object writer for ELF object files * ARM64 llvm patches for object writer * ARM64 include untested helper code with debug break * ARM64 reenable scanning fail exception * ARM64 formating * ARM64: revert using alternative JIT * Revert "ARM64 unix stack walk" This reverts commit 6c9e235. * Arm64 (#7) * CoreRT-ARM64: Helper node asm code generation * CoreRT ARM64: Add additional relocation support * CoreRT ARM64: Use alternative functions for write Barriers On ARM the Jit uses a special register interface for to call the write barrier functions. But as the regular once still used in other places we need two different implemenations. The helper nodes need to call the custom variants * ARM64 code generation * unwind use only the dwarf index option * ARM64 runtime assembler functions * ARM64 unix stack walk * ARM64 Exception Handling * ARM64: Fix EH data decodeing * Move nattive layout signature from read only to data section on non Windows target * Fix exception handling macro call * ARM64 thunk helpers * ARM64 process cfi data for elf * ARM64 missing assembler macro * ARM64 port more assembler helpers * ARM64: Add missing case for the gemeric helper node * ARM64 intrinsic support * ARM64 object writer for ELF object files * ARM64 llvm patches for object writer * ARM64 include untested helper code with debug break * ARM64 reenable scanning fail exception * ARM64 formating * ARM64: revert using alternative JIT * Revert "ARM64 unix stack walk" * ARM64 review reworks * Arm64: review reworks (#10) * Arm64 (#11) * ARM64: remove left over code * Update src/Native/Runtime/arm64/WriteBarriers.S * Sync to head (#12) * Fix alignment of marshaled inline arrays (dotnet#8275) Fixes dotnet#8274 * Correct flags for allocating in RhpNewFastMisalign. Add fast path (dotnet#8277) * add switch case for LPUTF8Str in array element (dotnet#8278) * Wasm: Add support for DefaultConstructorOf and hence Activator.CreateInstance<T> (dotnet#8279) * Wasm: upgrade emscripten for an llvm and exception fixes. (dotnet#8281) * upgrade emscripten for some llvm and exception fixes. Correct retrieval of exception from landing pad. end c++ exception when catch found. * Update ILToWebAssemblyImporter.cs remove cut/past comment * Wasm: add support for new StackTrace().ToString() (dotnet#8201) * wasm add rethrow support (dotnet#8206) * Wasm: add support for overflow checks on signed and unsigned ints multiply (dotnet#8259) * wasm-ovf-unsigned-int * refactor for stack kind tests and add signed check * use llvm intrinsics * Wasm: bring add and sub overflow operations in line with mul (dotnet#8284) * Support for ARM64 on UNIX like systems compiler and runtime (dotnet#8271) * CoreRT-ARM64: Helper node asm code generation * CoreRT ARM64: Add additional relocation support * CoreRT ARM64: Use alternative functions for write Barriers On ARM the Jit uses a special register interface for to call the write barrier functions. But as the regular once still used in other places we need two different implementations. The helper nodes need to call the custom variants * ARM64 code generation * unwind use only the dwarf index option * ARM64 runtime assembler functions * ARM64 unix stack walk * ARM64 Exception Handling * ARM64: Fix EH data decoding * Move native layout signature from read only to data section on non Windows target * Fix exception handling macro call * ARM64 thunk helpers * ARM64 process cfi data for elf * ARM64 missing assembler macro * ARM64 port more assembler helpers * ARM64: Add missing case for the generic helper node * ARM64 intrinsic support * ARM64 object writer for ELF object files * ARM64 llvm patches for object writer * ARM64 include untested helper code with debug break * ARM64 reenable scanning fail exception * ARM64 Fix wrong function call for invoke return * ARM64: Ensure module fixup node data is aligned Data is updated with a compare exchange operation. Therefore it needs to be aligned or it will trigger a data exception on ARM64 CPUs * Wasm fix LLVM Debug Information subroutine linkage (dotnet#8288) * wasm - reinstate llvm debug subroutine linkage Co-authored-by: Jan Kotas <[email protected]> Co-authored-by: yowl <[email protected]> Co-authored-by: Jan Kotas <[email protected]> Co-authored-by: yowl <[email protected]>
Hello there,
I stumbled upon a discrepancy between regular .Net runtimes and CoreRT when it comes to
Marshel.SizeOf()
.Sorry if I don't have a more precise isolated case than this, but here is a practical example from trying to get one of our project to run properly on CoreRT.
This type: https://github.com/rlabrecque/Steamworks.NET/blob/ee014372d1c1077c6fbbc2d7cb88e38fe4a56453/Plugins/Steamworks.NET/autogen/SteamCallbacks.cs#L1768
is expected to have a
Marshel.SizeOf()
of 616, but CoreRT returns 612.Not very workable of an example, I concede, but I hope it helps nonetheless.
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