Merge pull request #37578 from mmusich/customizeForOTInefficiency

[OT inefficiency] add 0% bad strip scenario to customization function and generate new RelVal workflows

Configuration/PyReleaseValidation/python/relval_2026.py

@@ -37,6 +37,7 @@
 numWFIB.extend([39434.5,39434.9,39434.501,39434.502]) #2026D88 pixelTrackingOnly, vector hits, Patatrack local reconstruction on CPU, Patatrack local reconstruction on GPU
 numWFIB.extend([39634.99,39634.999]) #2026D88 premixing combined stage1+stage2 (ttbar+PU200, ttbar+PU50 for PR test)
 numWFIB.extend([39434.21,39634.21,39634.9921]) #2026D88 prodlike, prodlike PU, prodlike premix stage1+stage2
+numWFIB.extend([39634.114]) #2026D88 PU, with 10% OT ineffiency
 numWFIB.extend([39834.0]) #2026D89
 numWFIB.extend([40234.0]) #2026D90
 numWFIB.extend([40634.0]) #2026D91

Configuration/PyReleaseValidation/python/upgradeWorkflowComponents.py

@@ -1370,6 +1370,49 @@ def condition(self, fragment, stepList, key, hasHarvest):
 upgradeWFs['Aging3000'].offset = 0.103
 upgradeWFs['Aging3000'].lumi = '3000'
 
+#
+# Simulates Bias Rail in Phase-2 OT PS modules and X% random bad Strips
+# in PS-s and SS sensors
+#
+class UpgradeWorkflow_OTInefficiency(UpgradeWorkflow):
+    def setup_(self, step, stepName, stepDict, k, properties):
+        if 'Digi' in step:
+            stepDict[stepName][k] = merge([{'--customise': 'SimTracker/SiPhase2Digitizer/customizeForOTInefficiency.customizeSiPhase2OTInefficiency'+self.percent+'Percent'}, stepDict[step][k]])
+    def condition(self, fragment, stepList, key, hasHarvest):
+        return fragment=="TTbar_14TeV" and '2026' in key
+# define several of them
+upgradeWFs['OTInefficiency'] = UpgradeWorkflow_OTInefficiency(
+    steps =  [
+        'Digi',
+        'DigiTrigger',
+    ],
+    PU =  [
+        'Digi',
+        'DigiTrigger',
+    ],
+    suffix = '_OTInefficiency',
+    offset = 0.111,
+)
+upgradeWFs['OTInefficiency'].percent = 'Zero'
+
+# 1% bad strips
+upgradeWFs['OTInefficiency1PC'] = deepcopy(upgradeWFs['OTInefficiency'])
+upgradeWFs['OTInefficiency1PC'].suffix = '_OTInefficiency1PC'
+upgradeWFs['OTInefficiency1PC'].offset = 0.112
+upgradeWFs['OTInefficiency1PC'].percent = 'One'
+
+# 5% bad strips
+upgradeWFs['OTInefficiency5PC'] = deepcopy(upgradeWFs['OTInefficiency'])
+upgradeWFs['OTInefficiency5PC'].suffix = '_OTInefficiency5PC'
+upgradeWFs['OTInefficiency5PC'].offset = 0.113
+upgradeWFs['OTInefficiency5PC'].percent = 'Five'
+
+# 10% bad strips
+upgradeWFs['OTInefficiency10PC'] = deepcopy(upgradeWFs['OTInefficiency'])
+upgradeWFs['OTInefficiency10PC'].suffix = '_OTInefficiency10PC'
+upgradeWFs['OTInefficiency10PC'].offset = 0.114
+upgradeWFs['OTInefficiency10PC'].percent = 'Ten'
+
 # Specifying explicitly the --filein is not nice but that was the
 # easiest way to "skip" the output of step2 (=premixing stage1) for
 # filein (as it goes to pileup_input). It works (a bit accidentally

SimTracker/SiPhase2Digitizer/python/customizeForOTInefficiency.py

@@ -35,6 +35,15 @@ def _commonCustomizeForInefficiency(process):
 
     return process
 
+#
+# activate bias rail inefficiency only
+#
+def customizeSiPhase2OTInefficiencyZeroPercent(process):
+
+    _commonCustomizeForInefficiency(process)
+
+    return process
+
 #
 # activate bias rail inefficiency and 1% random bad strips
 #