Code

Adds some example railcom feedback#552

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balazsracz merged 56 commits intomasterbakerstu/openmrn:masterfrom bracz-st-decoder-updatebakerstu/openmrn:bracz-st-decoder-updateCopy head branch name to clipboardAug 2, 2021

+136-8

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Commits on Jul 4, 2021

• Adds implementation for computing and checking CRC-8 according to the Dallas/Maxim specification.

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• Fix style

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• Switches the DCC decoder to use zero-copy buffering.

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• Adds yield when the next packet shows up.

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• Fix style to be simpler to read.

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• Fixes bugs around packet length.

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• Merge branch 'bracz-crc8-d-m' into bracz-dccdecode-ec

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• Adds code to verify the XOR and the CRC8 checksum.

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• Up max payload.

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• Adds a delta capability for tuning the railcom cutout timing.

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• Prints the correct expected DLC in case of an error.

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• Prints the correct expected DLC in case of an error.

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• Merge branch 'bracz-dccdecode-ec' into merge-branch

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• Adds support for the STM32UART to set the buad rate via ioctl.

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• Merge branch 'bracz-st-uart-baud' into merge-branch

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• Adds a railcom UART transmitter to the f091 dcc decoder.

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• Merge branch 'merge-branch' into bracz-st-decoder-update

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• Adds support for F0 command decoding.

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Commits on Jul 10, 2021

• Fix bug and unnecessary copy.

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• Adds documentation to explain where the test vector comes from.

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• Merge commit 'd551997cd9ef47ac5edb709272c4e7f1f29f677f' into bracz-crc8-d-m

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• Merge branch 'master' into bracz-dccdecoder-zero-copy

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• Merge branch 'bracz-crc8-d-m' into bracz-dcc-ec-base

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• Merge branch 'bracz-dccdecoder-zero-copy' into bracz-dcc-ec-base

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• Merge branch 'bracz-dcc-ec-base' into bracz-dccdecode-ec

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• Fix whitespace.

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• Merge branch 'master' into bracz-st-uart-baud

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• Merge commit '57b05968a67ff385ad6b6353d7744aa20da7763c' into bracz-dccdecode-ec

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• Merge branch 'bracz-dccdecode-ec' into merge-branch

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• Merge branch 'bracz-st-uart-baud' into merge-branch

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• Merge branch 'merge-branch' into bracz-st-decoder-update

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• Fixes up the compilation of the Tiva DCC decoder target.

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• Adds API for railcom sender implementation.

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• Adds railcom sender implementation for STM32.

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• Merge branch 'dcc-railcom-send' into bracz-st-decoder-update

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• Adds a call in the DCC interrupt to fill in the railcom feedback.

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• Adds the send functions to the railcom driver.

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• Switches uart1 to the stm32 railcom driver.

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• Fixes bugs in the stm32 railcom sender.

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• Implements the railcom sender in the main for the dcc-decoder app.

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• Fixes bugs in the stm32 railcom sender.

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• Merge branch 'dcc-railcom-send' into bracz-st-decoder-update

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Commits on Jul 11, 2021

• Adds a call in the DCC interrupt to fill in the railcom feedback.

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• Adds the send functions to the railcom driver.

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• Fixes bugs in the stm32 railcom sender.

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• Merge commit 'ce00406ba1fe40cf1002f787e0338eaa8ed49231' into bracz-st-decoder-update

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• Removes unneeded forward declaration.

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• Merge branch 'dcc-railcom-send' into bracz-st-decoder-update

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• Sends all zeros to check timing.

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• Adds routines to encode railcom data for a sender.

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• Merge branch 'bracz-railcom-encode' into bracz-st-decoder-update

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Commits on Aug 2, 2021

• Fix comment.

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• Merge branch 'master' into dcc-railcom-send

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• Merge branch 'dcc-railcom-send' into bracz-st-decoder-update

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• Merge branch 'master' into bracz-railcom-encode

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• Merge branch 'bracz-railcom-encode' into bracz-st-decoder-update

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