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[SVDConv] runs in infinite loop when using generate partition on SVD file without <sauNumRegions> element under <cpu> #1082 (#671) #1086

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Aug 9, 2023
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[SVDConv] runs in infinite loop when using generate partition on SVD file without <sauNumRegions> element under <cpu> #1082 (#671) #1086

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63 changes: 37 additions & 26 deletions tools/svdconv/SVDGenerator/src/PartitionData.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -39,11 +39,11 @@ PartitionData::PartitionData(const FileHeaderInfo& fileHeaderInfo, const SvdOpti
m_genH(nullptr),
m_genSfd(nullptr),
m_numOfItns(0)
{
{
m_fileIo = new FileIo();
m_genH = new HeaderGenerator(m_fileIo);
m_genSfd = new SfdGenerator(m_fileIo);

m_fileIo->SetSvdFileName (fileHeaderInfo.svdFileName);
m_fileIo->SetProgramDescription (fileHeaderInfo.descr);
m_fileIo->SetCopyrightString (fileHeaderInfo.copyright);
Expand Down Expand Up @@ -107,7 +107,7 @@ bool PartitionData::CreateHeadingBegin(const string& text)
CreateCCommentBegin();
m_genSfd->Generate<sfd::HEADING|sfd::BEGIN>(text.c_str());
CreateCCommentEnd();

return true;
}

Expand All @@ -117,7 +117,7 @@ bool PartitionData::CreateHeadingEnd()
m_genSfd->Generate<sfd::HEADING|sfd::END>("");
CreateCCommentEnd();
m_genH->Generate<c_header::DIRECT>("");

return true;
}

Expand All @@ -126,12 +126,12 @@ bool PartitionData::CreateHeadingEnableBegin(const string& text)
CreateCCommentBegin();
m_genSfd->Generate<sfd::HEADINGENABLE|sfd::BEGIN>(text.c_str());
CreateCCommentEnd();

return true;
}

bool PartitionData::CreateHeadingEnableEnd()
{
{
CreateCCommentBegin();
m_genSfd->Generate<sfd::HEADINGENABLE|sfd::END>("");
CreateCCommentEnd();
Expand Down Expand Up @@ -177,7 +177,7 @@ bool PartitionData::CreatePartitionStart(SvdDevice *device)
const auto& name = device->GetName();
const auto& vendor = device->GetVendor();
string headerDef = name;

SvdUtils::ToUpper(headerDef);
CreateConfWizStart();

Expand Down Expand Up @@ -205,7 +205,7 @@ bool PartitionData::CreatePartitionEnd(SvdDevice *device)
m_genH->Generate<c_header::MAKE|c_header::MK_DOXYENDGROUP >("%s", name.c_str());
m_genH->Generate<c_header::MAKE|c_header::MK_DOXYENDGROUP >("%s", vendor.c_str());
m_genH->Generate<c_header::DIRECT >("");

return true;
}

Expand All @@ -217,7 +217,7 @@ bool PartitionData::CreateSauRegionsConfig(SvdCpu *cpu)

m_genH->Generate<c_header::DESCR|c_header::PART>("SAU Regions Config");

CreateHeadingBegin ("Initialize Secure Attribute Unit (SAU) Address Regions");
CreateHeadingBegin ("Initialize Secure Attribute Unit (SAU) Address Regions");
CreateMaxNumSauRegions (cpu);
CreateInitSauRegions (cpu);
CreateHeadingEnd ();
Expand All @@ -235,6 +235,11 @@ bool PartitionData::CreateMaxNumSauRegions(SvdCpu *cpu)
const string name = "SAU_REGIONS_MAX";
const string descr = "Max. number of SAU regions";

if(value == SvdItem::VALUE32_NOT_INIT) {
m_genH->Generate<c_header::C_ERROR>("SAU Regions Config: Number of SAU regions not set", cpu->GetLineNumber());
value = 0;
}

m_genH->Generate<c_header::MAKE|c_header::MK_DEFINE>("%s", value, 10, -1, descr.c_str(), name.c_str());

return true;
Expand All @@ -252,7 +257,7 @@ bool PartitionData::CreateSauGlobalConfig(SvdCpu *cpu)
CreateSauInitControlEnable (cpu);
CreateSauAllNonSecure (cpu);
CreateHeadingEnableEnd ();

return true;
}

Expand Down Expand Up @@ -286,7 +291,7 @@ bool PartitionData::CreateSauInitControlEnable(SvdCpu *cpu)
bool value = sauRegionsCfg->GetEnabled();
const string name = "SAU_INIT_CTRL_ENABLE";
const string descr = "SAU->CTRL register bit ENABLE";

CreateCCommentBegin();
m_genSfd->Generate<sfd::QOPTION|sfd::SINGLE >("Enable SAU");
m_genSfd->Generate<sfd::INFO|sfd::SINGLE >("%s", descr.c_str());
Expand Down Expand Up @@ -339,7 +344,7 @@ bool PartitionData::CreateInitSauRegions(SvdCpu *cpu)
if(!sauRegionsCfg) {
return true;
}

const auto& childs = sauRegionsCfg->GetChildren();
if(childs.empty()) {
return true;
Expand Down Expand Up @@ -469,7 +474,7 @@ bool PartitionData::CreateSleepAndExceptionBegin(SvdCpu *cpu)
}

bool PartitionData::CreateDeepSleep(SvdCpu *cpu)
{
{
if(!cpu) {
return false;
}
Expand All @@ -489,7 +494,7 @@ bool PartitionData::CreateDeepSleep(SvdCpu *cpu)
}

bool PartitionData::CreateSystemReset(SvdCpu *cpu)
{
{
if(!cpu) {
return false;
}
Expand All @@ -509,7 +514,7 @@ bool PartitionData::CreateSystemReset(SvdCpu *cpu)
}

bool PartitionData::CreatePriorityExceptions(SvdCpu *cpu)
{
{
if(!cpu) {
return false;
}
Expand All @@ -529,7 +534,7 @@ bool PartitionData::CreatePriorityExceptions(SvdCpu *cpu)
}

bool PartitionData::CreateFault(SvdCpu *cpu)
{
{
if(!cpu) {
return false;
}
Expand Down Expand Up @@ -653,7 +658,7 @@ bool PartitionData::CreateFloatingPointUnitNsacrCp10Cp11(SvdCpu *cpu)
CreateCCommentBegin();
m_genSfd->Generate<sfd::OPTION|sfd::SINGLE >("Floating Point Unit usage");
m_genSfd->Generate<sfd::MAKE|sfd::MK_OPTSEL >("Secure state only", 0);
m_genSfd->Generate<sfd::MAKE|sfd::MK_OPTSEL >("Secure and Non-Secure state", 3);
m_genSfd->Generate<sfd::MAKE|sfd::MK_OPTSEL >("Secure and Non-Secure state", 3);
m_genSfd->Generate<sfd::INFO|sfd::SINGLE >("Value for SCB->NSACR register bits CP10, CP11");
CreateCCommentEnd();
m_genH->Generate<c_header::MAKE|c_header::MK_DEFINE >("%s", value, 10, -1, descr.c_str(), name.c_str());
Expand Down Expand Up @@ -751,7 +756,7 @@ bool PartitionData::CreateSetupInterruptTarget(SvdDevice *device)
CreateInterruptBlock(interrupt, num);
m_numOfItns++;
}

CreateHeadingEnd();

return true;
Expand Down Expand Up @@ -782,7 +787,7 @@ bool PartitionData::CreateInterruptBlock(const map<int32_t, SvdInterrupt*>& inte

CreateInterruptBlockBegin(num);
CreateCCommentBegin();

for(const auto& [key, interrupt] : interrupts) {
if(!interrupt) {
continue;
Expand Down Expand Up @@ -819,7 +824,7 @@ bool PartitionData::CreateSetupInterruptTargetItem(SvdInterrupt *interrupt)
m_genSfd->Generate<sfd::OBIT_NORANGE >("%s", num, name.c_str());
m_genSfd->Generate<sfd::INFO|sfd::SINGLE >("%s", descr.c_str());
m_genSfd->Generate<sfd::MAKE|sfd::MK_ENABLEDISABLE >("", "Secure state", "Non-Secure state");

return true;
}

Expand All @@ -833,7 +838,7 @@ bool PartitionData::CreateSauRegions(SvdCpu *cpu)

CreateSauRegionMacro (cpu);
CreateSauSetup (cpu);

return true;
}

Expand Down Expand Up @@ -875,11 +880,17 @@ bool PartitionData::CreateSauSetup(SvdCpu *cpu)
m_genH->Generate<c_header::DIRECT >("");

uint32_t numOfSauRegions = cpu->GetSauNumRegions();
for(uint32_t i=0; i<numOfSauRegions; i++) {
m_genH->Generate<c_header::DIRECT >(" #if defined (SAU_INIT_REGION%i) && (SAU_INIT_REGION%i == 1U)", i, i);
m_genH->Generate<c_header::DIRECT >(" SAU_INIT_REGION(%i);", i);
m_genH->Generate<c_header::DIRECT >(" #endif");
if(numOfSauRegions == SvdItem::VALUE32_NOT_INIT) {
m_genH->Generate<c_header::C_ERROR>("SAU Setup: Number of SAU regions not set", cpu->GetLineNumber());
}
else {
for(uint32_t i=0; i<numOfSauRegions; i++) {
m_genH->Generate<c_header::DIRECT >(" #if defined (SAU_INIT_REGION%i) && (SAU_INIT_REGION%i == 1U)", i, i);
m_genH->Generate<c_header::DIRECT >(" SAU_INIT_REGION(%i);", i);
m_genH->Generate<c_header::DIRECT >(" #endif");
}
}

m_genH->Generate<c_header::DIRECT >("");
m_genH->Generate<c_header::DIRECT >(" #endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */");

Expand Down Expand Up @@ -930,7 +941,7 @@ bool PartitionData::CreateSauSetup(SvdCpu *cpu)
m_genH->Generate<c_header::DIRECT >(" #endif");
m_genH->Generate<c_header::DIRECT >("");
}

m_genH->Generate<c_header::DIRECT >("}");

return true;
Expand Down
10 changes: 8 additions & 2 deletions tools/svdconv/SVDModel/src/SvdCpu.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -336,9 +336,15 @@ bool SvdCpu::CheckItem()
LogMsg("M363", lineNo);
m_sauRegionsConfig->Invalidate();
}
else if(m_sauNumRegions > MAXNUM_SAU_REGIONS) {
}

if(m_sauNumRegions != SvdItem::VALUE32_NOT_INIT) {
if(m_sauNumRegions == 0 || m_sauNumRegions > MAXNUM_SAU_REGIONS) {
LogMsg("M364", NUM(m_sauNumRegions), NUM2(MAXNUM_SAU_REGIONS), lineNo);
m_sauRegionsConfig->Invalidate();
m_sauNumRegions = SvdItem::VALUE32_NOT_INIT;
if(m_sauRegionsConfig) {
m_sauRegionsConfig->Invalidate();
}
}
}

Expand Down
111 changes: 111 additions & 0 deletions tools/svdconv/Test/data/sauConfig/SSE300_errs.svd
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Original file line number Diff line number Diff line change
@@ -0,0 +1,111 @@
<?xml version="1.0" encoding="utf-8"?>
<!--
Copyright (C) 2012-2022 ARM Limited. All rights reserved.

Purpose: System Viewer Description (SVD) Example (Schema Version 1.1)
This is a description of a none-existent and incomplete device
for demonstration purposes only.

Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
- Neither the name of ARM nor the names of its contributors may be used
to endorse or promote products derived from this software without
specific prior written permission.

THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
-->
<!-- This file is derivative from IOTKit_CM33.svd -->
<device schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="CMSIS-SVD.xsd">
<vendor>ARM Ltd.</vendor>
<vendorID>ARM</vendorID>
<name>SSE300_errs</name>
<series>ARMv8.1-M Mainline</series>
<version>1.0</version>
<description>ARM 32-bit v8.1-M Mainline based device</description>
<licenseText>
ARM Limited (ARM) is supplying this software for use with Cortex-M\n
processor based microcontroller, but can be equally used for other\n
suitable processor architectures. This file can be freely distributed.\n
Modifications to this file shall be clearly marked.\n
\n
THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED\n
OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF\n
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.\n
ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR\n
CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
</licenseText>
<cpu>
<name>CM55</name>
<revision>r0p0</revision>
<endian>little</endian>
<mpuPresent>true</mpuPresent>
<fpuPresent>true</fpuPresent>
<nvicPrioBits>3</nvicPrioBits>
<vendorSystickConfig>false</vendorSystickConfig>
<sauNumRegions>256</sauNumRegions>
</cpu>
<addressUnitBits>8</addressUnitBits>
<width>32</width>
<size>32</size>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<resetMask>0xFFFFFFFF</resetMask>
<peripherals>
<peripheral>
<name>SYSCOUNTER_CNTRL</name>
<description>System counter control</description>
<baseAddress>0x58100000</baseAddress>
<size>32</size>
<access>read-write</access>
<addressBlock>
<offset>0</offset>
<size>0x1000</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
<name>System_Timestamp_Counter</name>
<description>System Timestamp Counter Interrupt</description>
<value>1</value>
</interrupt>
<registers>
<register>
<name>CNTSR</name>
<description>Counter frequency status information</description>
<addressOffset>0x4</addressOffset>
<size>32</size>
<access>read-only</access>
</register>
<register>
<name>CNTCV</name>
<description>Current count value</description>
<addressOffset>0x8</addressOffset>
<size>64</size>
<access>read-write</access>
</register>
<register>
<name>CNTSCR</name>
<description>Stores the Counter Scaling value</description>
<addressOffset>0x10</addressOffset>
<size>32</size>
<access>read-write</access>
<resetValue>0x01000000</resetValue>
</register>
</registers>
</peripheral>
</peripherals>
</device>
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