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AArch64 decoder: Add all condition code-touching instructions #4849

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derekbruening opened this issue Apr 14, 2021 · 2 comments
Open

AArch64 decoder: Add all condition code-touching instructions #4849

derekbruening opened this issue Apr 14, 2021 · 2 comments
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@MDevereau
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Component-IR Google-Affecting OpSys-AArch64 Priority-High

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@derekbruening
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Splitting sub-pieces off from the master issue #2626 on finishing the AArch64 decoder. This piece covers ensuring that all instructions that either read or write the condition codes (NZCVQGE) are fully decoded and encoded. Xref the instruction lists here: #2626 (comment). Xref how missing cases here caused hard-to-debug problems in #4687 and the workaround we put in place which assumes all unknown opcodes both read and write the codes, which adds overhead. We would like to remove the workaround once we have confidence that all the cases are handled.
MDevereau added a commit that referenced this issue Apr 27, 2021
@MDevereau
i#2626 AArch64 v8.0 Decode: Order dis-a64.txt alphabetically
bc92f31 
Ordering dis-a64.txt alphabetically by instruction name will make it
much easier to navigate and detect missing or erroneous tests.

Issue: #2626, #4847, #4848, #4849
@MDevereau MDevereau mentioned this issue Apr 27, 2021
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AssadHashmi pushed a commit that referenced this issue Apr 27, 2021
@MDevereau
i#2626 AArch64 v8.0 Decode: Order dis-a64.txt alphabetically (#4882)
1640ffe 
Ordering dis-a64.txt alphabetically by instruction name will make it
much easier to navigate and detect missing or erroneous tests.

Issue: #2626, #4847, #4848, #4849
@derekbruening derekbruening mentioned this issue May 25, 2021
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@AssadHashmi
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Missing opcodes that touch condition codes: 9 of 30 as at 17-06-21.

@abhinav92003
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abhinav92003 commented Jun 21, 2021 •
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Hit this issue while working on PR #4917. Cannot use the undefined opcode to trigger a fault to verify proper restoration of aflags native val on fault for AArch64. This is because aflags are restored automatically before the undefined opcode that is assumed to read aflags.

@MDevereau MDevereau mentioned this issue Jun 25, 2021
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AssadHashmi added a commit that referenced this issue Jun 25, 2021
@AssadHashmi
i#4849: AArch64 decode: Add FCSEL FMAXV FMINV FCMP FCCMP FCCMPE (#4966)
827eb9f 
Adds the following instructions to the codec:

FCSEL <Hd>, <Hn>, <Hm>, <cond>
FCSEL <Sd>, <Sn>, <Sm>, <cond>
FCSEL <Dd>, <Dn>, <Dm>, <cond>
FMAXV <V><d>, <Vn>.<T>
FMINV <V><d>, <Vn>.<T>
FCMP <Hn>, <Hm>
FCMP <Hn>, #0.0
FCMP <Sn>, <Sm>
FCMP <Sn>, #0.0
FCMP <Dn>, <Dm>
FCMP <Dn>, #0.0
FCCMP <Hn>, <Hm>, #<nzcv>, <cond>
FCCMP <Sn>, <Sm>, #<nzcv>, <cond>
FCCMP <Dn>, <Dm>, #<nzcv>, <cond>
FCCMPE <Hn>, <Hm>, #<nzcv>, <cond>
FCCMPE <Sn>, <Sm>, #<nzcv>, <cond>
FCCMPE <Dn>, <Dm>, #<nzcv>, <cond>

Issue: #2626, #4849
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@abhinav92003 @derekbruening @AssadHashmi @MDevereau