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restore codegen.zig
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@gwenzek
gwenzek committed Nov 2, 2021
1 parent ad71d82 commit 310f3df
Showing 1 changed file with 8 additions and 13 deletions.
21 changes: 8 additions & 13 deletions src/codegen.zig
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Original file line number Diff line number Diff line change
Expand Up @@ -84,12 +84,12 @@ pub fn generateFunction(
) GenerateSymbolError!FnResult {
switch (bin_file.options.target.cpu.arch) {
.wasm32 => unreachable, // has its own code path
// .wasm64 => unreachable, // has its own code path
// .arm => return Function(.arm).generate(bin_file, src_loc, func, air, liveness, code, debug_output),
// .armeb => return Function(.armeb).generate(bin_file, src_loc, func, air, liveness, code, debug_output),
// .aarch64 => return Function(.aarch64).generate(bin_file, src_loc, func, air, liveness, code, debug_output),
// .aarch64_be => return Function(.aarch64_be).generate(bin_file, src_loc, func, air, liveness, code, debug_output),
// .aarch64_32 => return Function(.aarch64_32).generate(bin_file, src_loc, func, air, liveness, code, debug_output),
.wasm64 => unreachable, // has its own code path
.arm => return Function(.arm).generate(bin_file, src_loc, func, air, liveness, code, debug_output),
.armeb => return Function(.armeb).generate(bin_file, src_loc, func, air, liveness, code, debug_output),
.aarch64 => return Function(.aarch64).generate(bin_file, src_loc, func, air, liveness, code, debug_output),
.aarch64_be => return Function(.aarch64_be).generate(bin_file, src_loc, func, air, liveness, code, debug_output),
.aarch64_32 => return Function(.aarch64_32).generate(bin_file, src_loc, func, air, liveness, code, debug_output),
//.arc => return Function(.arc).generate(bin_file, src_loc, func, air, liveness, code, debug_output),
//.avr => return Function(.avr).generate(bin_file, src_loc, func, air, liveness, code, debug_output),
//.bpfel => return Function(.bpfel).generate(bin_file, src_loc, func, air, liveness, code, debug_output),
Expand All @@ -106,7 +106,7 @@ pub fn generateFunction(
//.r600 => return Function(.r600).generate(bin_file, src_loc, func, air, liveness, code, debug_output),
//.amdgcn => return Function(.amdgcn).generate(bin_file, src_loc, func, air, liveness, code, debug_output),
//.riscv32 => return Function(.riscv32).generate(bin_file, src_loc, func, air, liveness, code, debug_output),
// .riscv64 => return Function(.riscv64).generate(bin_file, src_loc, func, air, liveness, code, debug_output),
.riscv64 => return Function(.riscv64).generate(bin_file, src_loc, func, air, liveness, code, debug_output),
//.sparc => return Function(.sparc).generate(bin_file, src_loc, func, air, liveness, code, debug_output),
//.sparcv9 => return Function(.sparcv9).generate(bin_file, src_loc, func, air, liveness, code, debug_output),
//.sparcel => return Function(.sparcel).generate(bin_file, src_loc, func, air, liveness, code, debug_output),
Expand All @@ -119,7 +119,7 @@ pub fn generateFunction(
.x86_64 => return Function(.x86_64).generate(bin_file, src_loc, func, air, liveness, code, debug_output),
//.xcore => return Function(.xcore).generate(bin_file, src_loc, func, air, liveness, code, debug_output),
//.nvptx => return Function(.nvptx).generate(bin_file, src_loc, func, air, liveness, code, debug_output),
.nvptx64 => return Function(.nvptx64).generate(bin_file, src_loc, func, air, liveness, code, .none),
//.nvptx64 => return Function(.nvptx64).generate(bin_file, src_loc, func, air, liveness, code, debug_output),
//.le32 => return Function(.le32).generate(bin_file, src_loc, func, air, liveness, code, debug_output),
//.le64 => return Function(.le64).generate(bin_file, src_loc, func, air, liveness, code, debug_output),
//.amdil => return Function(.amdil).generate(bin_file, src_loc, func, air, liveness, code, debug_output),
Expand Down Expand Up @@ -3201,7 +3201,6 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {
try self.code.resize(self.code.items.len + 4);
try self.exitlude_jump_relocs.append(self.gpa, self.code.items.len - 4);
},
.nvptx, .nvptx64 => {},
else => return self.fail("TODO implement return for {}", .{self.target.cpu.arch}),
}
}
Expand Down Expand Up @@ -5435,7 +5434,6 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {
.riscv64 => @import("arch/riscv64/bits.zig").Register,
.arm, .armeb => @import("arch/arm/bits.zig").Register,
.aarch64, .aarch64_be, .aarch64_32 => @import("arch/aarch64/bits.zig").Register,
.nvptx, .nvptx64 => @import("arch/nvptx/bits.zig").Register,
else => enum {
dummy,

Expand Down Expand Up @@ -5464,7 +5462,6 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {
.riscv64 => @import("arch/riscv64/bits.zig").callee_preserved_regs,
.arm, .armeb => @import("arch/arm/bits.zig").callee_preserved_regs,
.aarch64, .aarch64_be, .aarch64_32 => @import("arch/aarch64/bits.zig").callee_preserved_regs,
.nvptx, .nvptx64 => @import("arch/nvptx/bits.zig").callee_preserved_regs,
else => [_]Register{},
};

Expand All @@ -5473,7 +5470,6 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {
.x86_64 => @import("arch/x86_64/bits.zig").c_abi_int_param_regs,
.arm, .armeb => @import("arch/arm/bits.zig").c_abi_int_param_regs,
.aarch64, .aarch64_be, .aarch64_32 => @import("arch/aarch64/bits.zig").c_abi_int_param_regs,
.nvptx, .nvptx64 => @import("arch/nvptx/bits.zig").c_abi_int_param_regs,
else => [_]Register{},
};

Expand All @@ -5482,7 +5478,6 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {
.x86_64 => @import("arch/x86_64/bits.zig").c_abi_int_return_regs,
.arm, .armeb => @import("arch/arm/bits.zig").c_abi_int_return_regs,
.aarch64, .aarch64_be, .aarch64_32 => @import("arch/aarch64/bits.zig").c_abi_int_return_regs,
.nvptx, .nvptx64 => @import("arch/nvptx/bits.zig").c_abi_int_return_regs,
else => [_]Register{},
};

Expand Down

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