Skip to content

Commit

Permalink
Merge pull request #5847 from Vexu/decl
Browse files Browse the repository at this point in the history 
Take advantage of new HashMap API's preserving order
  • Loading branch information
@andrewrk
andrewrk authored Jul 12, 2020
2 parents f23987d + 9907116 commit 2dcb70a
Show file tree
Hide file tree
Showing 17 changed files with 40 additions and 749 deletions.
39 changes: 24 additions & 15 deletions lib/std/target.zig
View file
Original file line number Diff line number Diff line change
Expand Up @@ -903,25 +903,34 @@ pub const Target = struct {
/// All processors Zig is aware of, sorted lexicographically by name.
pub fn allCpuModels(arch: Arch) []const *const Cpu.Model {
return switch (arch) {
.arm, .armeb, .thumb, .thumbeb => arm.all_cpus,
.aarch64, .aarch64_be, .aarch64_32 => aarch64.all_cpus,
.avr => avr.all_cpus,
.bpfel, .bpfeb => bpf.all_cpus,
.hexagon => hexagon.all_cpus,
.mips, .mipsel, .mips64, .mips64el => mips.all_cpus,
.msp430 => msp430.all_cpus,
.powerpc, .powerpc64, .powerpc64le => powerpc.all_cpus,
.amdgcn => amdgpu.all_cpus,
.riscv32, .riscv64 => riscv.all_cpus,
.sparc, .sparcv9, .sparcel => sparc.all_cpus,
.s390x => systemz.all_cpus,
.i386, .x86_64 => x86.all_cpus,
.nvptx, .nvptx64 => nvptx.all_cpus,
.wasm32, .wasm64 => wasm.all_cpus,
.arm, .armeb, .thumb, .thumbeb => comptime allCpusFromDecls(arm.cpu),
.aarch64, .aarch64_be, .aarch64_32 => comptime allCpusFromDecls(aarch64.cpu),
.avr => comptime allCpusFromDecls(avr.cpu),
.bpfel, .bpfeb => comptime allCpusFromDecls(bpf.cpu),
.hexagon => comptime allCpusFromDecls(hexagon.cpu),
.mips, .mipsel, .mips64, .mips64el => comptime allCpusFromDecls(mips.cpu),
.msp430 => comptime allCpusFromDecls(msp430.cpu),
.powerpc, .powerpc64, .powerpc64le => comptime allCpusFromDecls(powerpc.cpu),
.amdgcn => comptime allCpusFromDecls(amdgpu.cpu),
.riscv32, .riscv64 => comptime allCpusFromDecls(riscv.cpu),
.sparc, .sparcv9, .sparcel => comptime allCpusFromDecls(sparc.cpu),
.s390x => comptime allCpusFromDecls(systemz.cpu),
.i386, .x86_64 => comptime allCpusFromDecls(x86.cpu),
.nvptx, .nvptx64 => comptime allCpusFromDecls(nvptx.cpu),
.wasm32, .wasm64 => comptime allCpusFromDecls(wasm.cpu),

else => &[0]*const Model{},
};
}

fn allCpusFromDecls(comptime cpus: type) []const *const Cpu.Model {
const decls = std.meta.declarations(cpus);
var array: [decls.len]*const Cpu.Model = undefined;
for (decls) |decl, i| {
array[i] = &@field(cpus, decl.name);
}
return &array;
}
};

pub const Model = struct {
Expand Down
45 changes: 0 additions & 45 deletions lib/std/target/aarch64.zig
View file
Original file line number Diff line number Diff line change
Expand Up @@ -1505,48 +1505,3 @@ pub const cpu = struct {
}),
};
};

/// All aarch64 CPUs, sorted alphabetically by name.
/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
/// compiler has inefficient memory and CPU usage, affecting build times.
pub const all_cpus = &[_]*const CpuModel{
&cpu.apple_a10,
&cpu.apple_a11,
&cpu.apple_a12,
&cpu.apple_a13,
&cpu.apple_a7,
&cpu.apple_a8,
&cpu.apple_a9,
&cpu.apple_latest,
&cpu.apple_s4,
&cpu.apple_s5,
&cpu.cortex_a35,
&cpu.cortex_a53,
&cpu.cortex_a55,
&cpu.cortex_a57,
&cpu.cortex_a65,
&cpu.cortex_a65ae,
&cpu.cortex_a72,
&cpu.cortex_a73,
&cpu.cortex_a75,
&cpu.cortex_a76,
&cpu.cortex_a76ae,
&cpu.cyclone,
&cpu.exynos_m1,
&cpu.exynos_m2,
&cpu.exynos_m3,
&cpu.exynos_m4,
&cpu.exynos_m5,
&cpu.falkor,
&cpu.generic,
&cpu.kryo,
&cpu.neoverse_e1,
&cpu.neoverse_n1,
&cpu.saphira,
&cpu.thunderx,
&cpu.thunderx2t99,
&cpu.thunderxt81,
&cpu.thunderxt83,
&cpu.thunderxt88,
&cpu.tsv110,
};
45 changes: 0 additions & 45 deletions lib/std/target/amdgpu.zig
View file
Original file line number Diff line number Diff line change
Expand Up @@ -1276,48 +1276,3 @@ pub const cpu = struct {
}),
};
};

/// All amdgpu CPUs, sorted alphabetically by name.
/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
/// compiler has inefficient memory and CPU usage, affecting build times.
pub const all_cpus = &[_]*const CpuModel{
&cpu.bonaire,
&cpu.carrizo,
&cpu.fiji,
&cpu.generic,
&cpu.generic_hsa,
&cpu.gfx1010,
&cpu.gfx1011,
&cpu.gfx1012,
&cpu.gfx600,
&cpu.gfx601,
&cpu.gfx700,
&cpu.gfx701,
&cpu.gfx702,
&cpu.gfx703,
&cpu.gfx704,
&cpu.gfx801,
&cpu.gfx802,
&cpu.gfx803,
&cpu.gfx810,
&cpu.gfx900,
&cpu.gfx902,
&cpu.gfx904,
&cpu.gfx906,
&cpu.gfx908,
&cpu.gfx909,
&cpu.hainan,
&cpu.hawaii,
&cpu.iceland,
&cpu.kabini,
&cpu.kaveri,
&cpu.mullins,
&cpu.oland,
&cpu.pitcairn,
&cpu.polaris10,
&cpu.polaris11,
&cpu.stoney,
&cpu.tahiti,
&cpu.tonga,
&cpu.verde,
};
89 changes: 0 additions & 89 deletions lib/std/target/arm.zig
View file
Original file line number Diff line number Diff line change
Expand Up @@ -2145,92 +2145,3 @@ pub const cpu = struct {
}),
};
};

/// All arm CPUs, sorted alphabetically by name.
/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
/// compiler has inefficient memory and CPU usage, affecting build times.
pub const all_cpus = &[_]*const CpuModel{
&cpu.arm1020e,
&cpu.arm1020t,
&cpu.arm1022e,
&cpu.arm10e,
&cpu.arm10tdmi,
&cpu.arm1136j_s,
&cpu.arm1136jf_s,
&cpu.arm1156t2_s,
&cpu.arm1156t2f_s,
&cpu.arm1176j_s,
&cpu.arm1176jz_s,
&cpu.arm1176jzf_s,
&cpu.arm710t,
&cpu.arm720t,
&cpu.arm7tdmi,
&cpu.arm7tdmi_s,
&cpu.arm8,
&cpu.arm810,
&cpu.arm9,
&cpu.arm920,
&cpu.arm920t,
&cpu.arm922t,
&cpu.arm926ej_s,
&cpu.arm940t,
&cpu.arm946e_s,
&cpu.arm966e_s,
&cpu.arm968e_s,
&cpu.arm9e,
&cpu.arm9tdmi,
&cpu.cortex_a12,
&cpu.cortex_a15,
&cpu.cortex_a17,
&cpu.cortex_a32,
&cpu.cortex_a35,
&cpu.cortex_a5,
&cpu.cortex_a53,
&cpu.cortex_a55,
&cpu.cortex_a57,
&cpu.cortex_a7,
&cpu.cortex_a72,
&cpu.cortex_a73,
&cpu.cortex_a75,
&cpu.cortex_a76,
&cpu.cortex_a76ae,
&cpu.cortex_a8,
&cpu.cortex_a9,
&cpu.cortex_m0,
&cpu.cortex_m0plus,
&cpu.cortex_m1,
&cpu.cortex_m23,
&cpu.cortex_m3,
&cpu.cortex_m33,
&cpu.cortex_m35p,
&cpu.cortex_m4,
&cpu.cortex_m7,
&cpu.cortex_r4,
&cpu.cortex_r4f,
&cpu.cortex_r5,
&cpu.cortex_r52,
&cpu.cortex_r7,
&cpu.cortex_r8,
&cpu.cyclone,
&cpu.ep9312,
&cpu.exynos_m1,
&cpu.exynos_m2,
&cpu.exynos_m3,
&cpu.exynos_m4,
&cpu.exynos_m5,
&cpu.generic,
&cpu.iwmmxt,
&cpu.krait,
&cpu.kryo,
&cpu.mpcore,
&cpu.mpcorenovfp,
&cpu.neoverse_n1,
&cpu.sc000,
&cpu.sc300,
&cpu.strongarm,
&cpu.strongarm110,
&cpu.strongarm1100,
&cpu.strongarm1110,
&cpu.swift,
&cpu.xscale,
};
Loading

0 comments on commit 2dcb70a

Please sign in to comment.