bug: (x86) memory-to-register mv operation should not take two operands #3967
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qaco
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Codecov ReportAll modified and coverable lines are covered by tests ✅
Additional details and impacted files@@ Coverage Diff @@
## main #3967 +/- ##
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- Coverage 90.13% 90.12% -0.01%
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Files 458 458
Lines 58317 58340 +23
Branches 5706 5710 +4
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+ Hits 52563 52580 +17
- Misses 4349 4354 +5
- Partials 1405 1406 +1 ☔ View full report in Codecov by Sentry. |
superlopuh
reviewed
Feb 25, 2025
xdsl/dialects/x86/ops.py
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| """ | ||
| Copies the value from the memory location pointed to by r2 into r1. | ||
| Copies the value from the memory location pointed to by operand register into output register. |
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we've been using "source" and "destination" in riscv and asm, would that make sense as a description in x86 land also?
compor
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superlopuh
approved these changes
Feb 25, 2025
compor
approved these changes
Feb 26, 2025
| """ | ||
| Copies the value from the memory location pointed to by r2 into r1. | ||
| Copies the value from the memory location pointed to by source register into destination register. |
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Suggested change
| Copies the value from the memory location pointed to by source register into destination register. | |
| Copies the value from the memory location pointed to by source register r1 into destination register r2. |
| ```C | ||
| x[r1] = [x[r2]] | ||
| x[output] = [x[operand]] |
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Can you please adjust these based on r1 and r2 as per the rest of the file; I don't understand what output or operand is as they appear nowhere else in the API?
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