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add support for cascade lake, goldmont, and goldmont plus
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@graysky2
graysky2 committed Aug 22, 2019
1 parent 1da576e commit c3b39f5
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20 changes: 16 additions & 4 deletions README.md
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Original file line number Diff line number Diff line change
Expand Up @@ -66,13 +66,21 @@ The kernel uses its own set of CFLAGS, KCFLAGS. For exmaple, see:
<td>-march=znver2</td>
</tr>
<tr>
<td>Intel Bonnell family of low-power Atom processors (Bonnell)</td>
<td>Intel Bonnell family of low-power Atom processors</td>
<td>-march=bonnell</td>
</tr>
<tr>
<td>Intel Silvermont family of low-power Atom processors (Silvermont)</td>
<td>Intel Silvermont family of low-power Atom processors</td>
<td>-march=silvermont</td>
</tr>
<tr>
<td>Intel Goldmont family of low-power Atom processors (Apollo Lake and Denverton)</td>
<td>-march=goldmont</td>
</tr>
<tr>
<td>Intel Goldmont Plus family of low-power Atom processors (Gemini Lake)</td>
<td>-march=goldmont-plus</td>
</tr>
<tr>
<td>Intel 1st Gen Core i3/i5/i7-family (Nehalem)</td>
<td>-march=nehalem</td>
Expand Down Expand Up @@ -110,8 +118,12 @@ The kernel uses its own set of CFLAGS, KCFLAGS. For exmaple, see:
<td>-march=cannonlake</td>
</tr>
<tr>
<td>Intel 8th Gen Core i7/i9-family (Ice Lake)</td>
<td>-march=icelake</td>
<td>Intel 10th Gen Core i7/i9-family (Ice Lake)</td>
<td>-march=icelake-client</td>
</tr>
<tr>
<td>Intel Xeon (Cascade Lake)</td>
<td>-march=cascadelake</td>
</tr>
</table>

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101 changes: 73 additions & 28 deletions enable_additional_cpu_optimizations_for_gcc_v9.1+_kernel_v4.13+.patch
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Original file line number Diff line number Diff line change
Expand Up @@ -24,6 +24,8 @@ The expanded microarchitectures include:
* AMD Family 17h (Zen)
* AMD Family 17h (Zen 2)
* Intel Silvermont low-power processors
* Intel Goldmont low-power processors (Apollo Lake and Denverton)
* Intel Goldmont Plus low-power processors (Gemini Lake)
* Intel 1st Gen Core i3/i5/i7 (Nehalem)
* Intel 1.5 Gen Core i3/i5/i7 (Westmere)
* Intel 2nd Gen Core i3/i5/i7 (Sandybridge)
Expand All @@ -33,7 +35,8 @@ The expanded microarchitectures include:
* Intel 6th Gen Core i3/i5/i7 (Skylake)
* Intel 6th Gen Core i7/i9 (Skylake X)
* Intel 8th Gen Core i3/i5/i7 (Cannon Lake)
* Intel 8th Gen Core i7/i9 (Ice Lake)
* Intel 10th Gen Core i7/i9 (Ice Lake)
* Intel Xeon (Cascade Lake)

It also offers to compile passing the 'native' option which, "selects the CPU
to generate code for at compilation time by determining the processor type of
Expand Down Expand Up @@ -70,9 +73,9 @@ REFERENCES
4. https://github.com/graysky2/kernel_gcc_patch/issues/15
5. http://www.linuxforge.net/docs/linux/linux-gcc.php

--- a/arch/x86/include/asm/module.h 2018-04-01 17:20:27.000000000 -0400
+++ b/arch/x86/include/asm/module.h 2018-05-09 17:38:40.686541611 -0400
@@ -25,6 +25,30 @@ struct mod_arch_specific {
--- a/arch/x86/include/asm/module.h 2019-08-16 04:11:12.000000000 -0400
+++ b/arch/x86/include/asm/module.h 2019-08-22 15:56:23.988050322 -0400
@@ -25,6 +25,36 @@ struct mod_arch_specific {
#define MODULE_PROC_FAMILY "586MMX "
#elif defined CONFIG_MCORE2
#define MODULE_PROC_FAMILY "CORE2 "
Expand All @@ -84,6 +87,10 @@ REFERENCES
+#define MODULE_PROC_FAMILY "WESTMERE "
+#elif defined CONFIG_MSILVERMONT
+#define MODULE_PROC_FAMILY "SILVERMONT "
+#elif defined CONFIG_MGOLDMONT
+#define MODULE_PROC_FAMILY "GOLDMONT "
+#elif defined CONFIG_MGOLDMONTPLUS
+#define MODULE_PROC_FAMILY "GOLDMONTPLUS "
+#elif defined CONFIG_MSANDYBRIDGE
+#define MODULE_PROC_FAMILY "SANDYBRIDGE "
+#elif defined CONFIG_MIVYBRIDGE
Expand All @@ -100,10 +107,12 @@ REFERENCES
+#define MODULE_PROC_FAMILY "CANNONLAKE "
+#elif defined CONFIG_MICELAKE
+#define MODULE_PROC_FAMILY "ICELAKE "
+#elif defined CONFIG_MCASCADELAKE
+#define MODULE_PROC_FAMILY "CASCADELAKE "
#elif defined CONFIG_MATOM
#define MODULE_PROC_FAMILY "ATOM "
#elif defined CONFIG_M686
@@ -43,6 +67,28 @@ struct mod_arch_specific {
@@ -43,6 +73,28 @@ struct mod_arch_specific {
#define MODULE_PROC_FAMILY "K7 "
#elif defined CONFIG_MK8
#define MODULE_PROC_FAMILY "K8 "
Expand Down Expand Up @@ -132,8 +141,8 @@ REFERENCES
#elif defined CONFIG_MELAN
#define MODULE_PROC_FAMILY "ELAN "
#elif defined CONFIG_MCRUSOE
--- a/arch/x86/Kconfig.cpu 2018-04-01 17:20:27.000000000 -0400
+++ b/arch/x86/Kconfig.cpu 2018-05-07 17:44:43.306767555 -0400
--- a/arch/x86/Kconfig.cpu 2019-08-16 04:11:12.000000000 -0400
+++ b/arch/x86/Kconfig.cpu 2019-08-22 15:59:31.596946943 -0400
@@ -116,6 +116,7 @@ config MPENTIUMM
config MPENTIUM4
bool "Pentium-4/Celeron(P4-based)/Pentium-4 M/older Xeon"
Expand Down Expand Up @@ -283,7 +292,7 @@ REFERENCES
---help---

Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and
@@ -271,14 +361,106 @@ config MCORE2
@@ -271,14 +361,133 @@ config MCORE2
family in /proc/cpuinfo. Newer ones have 6 and older ones 15
(not a typo)

Expand Down Expand Up @@ -322,6 +331,24 @@ REFERENCES
+
+ Enables -march=silvermont
+
+config MGOLDMONT
+ bool "Intel Goldmont"
+ select X86_P6_NOP
+ ---help---
+
+ Select this for the Intel Goldmont platform including Apollo Lake and Denverton.
+
+ Enables -march=goldmont
+
+config MGOLDMONTPLUS
+ bool "Intel Goldmont Plus"
+ select X86_P6_NOP
+ ---help---
+
+ Select this for the Intel Goldmont Plus platform including Gemini Lake.
+
+ Enables -march=goldmont-plus
+
+config MSANDYBRIDGE
+ bool "Intel Sandy Bridge"
+ select X86_P6_NOP
Expand Down Expand Up @@ -390,13 +417,22 @@ REFERENCES
+ select X86_P6_NOP
+ ---help---
+
+ Select this for 8th Gen Core processors in the Ice Lake family.
+ Select this for 10th Gen Core processors in the Ice Lake family.
+
+ Enables -march=icelake-client
+
+config MCASCADELAKE
+ bool "Intel Cascade Lake"
+ select X86_P6_NOP
+ ---help---
+
+ Select this for Xeon processors in the Cascade Lake family.
+
+ Enables -march=icelake
+ Enables -march=cascadelake

config GENERIC_CPU
bool "Generic-x86-64"
@@ -287,6 +469,19 @@ config GENERIC_CPU
@@ -287,6 +496,19 @@ config GENERIC_CPU
Generic x86-64 CPU.
Run equally well on all x86-64 CPUs.

Expand All @@ -416,26 +452,26 @@ REFERENCES
endchoice

config X86_GENERIC
@@ -311,7 +506,7 @@ config X86_INTERNODE_CACHE_SHIFT
@@ -311,7 +533,7 @@ config X86_INTERNODE_CACHE_SHIFT
config X86_L1_CACHE_SHIFT
int
default "7" if MPENTIUM4 || MPSC
- default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MATOM || MVIAC7 || X86_GENERIC || GENERIC_CPU
+ default "6" if MK7 || MK8 || MK8SSE3 || MK10 || MBARCELONA || MBOBCAT || MBULLDOZER || MPILEDRIVER || MSTEAMROLLER || MEXCAVATOR || MZEN || MZEN2 || MJAGUAR || MPENTIUMM || MCORE2 || MNEHALEM || MWESTMERE || MSILVERMONT || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MNATIVE || MATOM || MVIAC7 || X86_GENERIC || GENERIC_CPU
+ default "6" if MK7 || MK8 || MK8SSE3 || MK10 || MBARCELONA || MBOBCAT || MBULLDOZER || MPILEDRIVER || MSTEAMROLLER || MEXCAVATOR || MZEN || MZEN2 || MJAGUAR || MPENTIUMM || MCORE2 || MNEHALEM || MWESTMERE || MSILVERMONT || MGOLDMONT || MGOLDMONTPLUS || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MCASCADELAKE || MNATIVE || MATOM || MVIAC7 || X86_GENERIC || GENERIC_CPU
default "4" if MELAN || M486 || MGEODEGX1
default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX

@@ -329,35 +524,36 @@ config X86_ALIGNMENT_16
@@ -329,35 +551,36 @@ config X86_ALIGNMENT_16

config X86_INTEL_USERCOPY
def_bool y
- depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK7 || MEFFICEON || MCORE2
+ depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK8SSE3 || MK7 || MEFFICEON || MCORE2 || MK10 || MBARCELONA || MNEHALEM || MWESTMERE || MSILVERMONT || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MNATIVE
+ depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK8SSE3 || MK7 || MEFFICEON || MCORE2 || MK10 || MBARCELONA || MNEHALEM || MWESTMERE || MSILVERMONT || MGOLDMONT || MGOLDMONTPLUS || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MCASCADELAKE || MNATIVE

config X86_USE_PPRO_CHECKSUM
def_bool y
- depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MVIAC7 || MEFFICEON || MGEODE_LX || MCORE2 || MATOM
+ depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MK10 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MK8SSE3 || MVIAC3_2 || MVIAC7 || MEFFICEON || MGEODE_LX || MCORE2 || MNEHALEM || MWESTMERE || MSILVERMONT || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MATOM || MNATIVE
+ depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MK10 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MK8SSE3 || MVIAC3_2 || MVIAC7 || MEFFICEON || MGEODE_LX || MCORE2 || MNEHALEM || MWESTMERE || MSILVERMONT || MGOLDMONT || MGOLDMONTPLUS || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MCASCADELAKE || MATOM || MNATIVE

config X86_USE_3DNOW
def_bool y
Expand All @@ -458,7 +494,7 @@ REFERENCES
- depends on (MCORE2 || MPENTIUM4 || MPSC)
+ default n
+ bool "Support for P6_NOPs on Intel chips"
+ depends on (MCORE2 || MPENTIUM4 || MPSC || MATOM || MNEHALEM || MWESTMERE || MSILVERMONT || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MNATIVE)
+ depends on (MCORE2 || MPENTIUM4 || MPSC || MATOM || MNEHALEM || MWESTMERE || MSILVERMONT || MGOLDMONT || MGOLDMONTPLUS || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MCASCADELAKE || MNATIVE)
+ ---help---
+ P6_NOPs are a relatively minor optimization that require a family >=
+ 6 processor, except that it is broken on certain VIA chips.
Expand All @@ -475,22 +511,22 @@ REFERENCES
config X86_TSC
def_bool y
- depends on (MWINCHIP3D || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2 || MATOM) || X86_64
+ depends on (MWINCHIP3D || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MK8SSE3 || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2 || MNEHALEM || MWESTMERE || MSILVERMONT || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MNATIVE || MATOM) || X86_64
+ depends on (MWINCHIP3D || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MK8SSE3 || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2 || MNEHALEM || MWESTMERE || MSILVERMONT || MGOLDMONT || MGOLDMONTPLUS || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MCASCADELAKE || MNATIVE || MATOM) || X86_64

config X86_CMPXCHG64
def_bool y
@@ -367,7 +563,7 @@ config X86_CMPXCHG64
@@ -367,7 +590,7 @@ config X86_CMPXCHG64
# generates cmov.
config X86_CMOV
def_bool y
- depends on (MK8 || MK7 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MCRUSOE || MEFFICEON || X86_64 || MATOM || MGEODE_LX)
+ depends on (MK8 || MK8SSE3 || MK10 || MBARCELONA || MBOBCAT || MBULLDOZER || MPILEDRIVER || MSTEAMROLLER || MEXCAVATOR || MZEN || MZEN2 || MJAGUAR || MK7 || MCORE2 || MNEHALEM || MWESTMERE || MSILVERMONT || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MCRUSOE || MEFFICEON || X86_64 || MNATIVE || MATOM || MGEODE_LX)
+ depends on (MK8 || MK8SSE3 || MK10 || MBARCELONA || MBOBCAT || MBULLDOZER || MPILEDRIVER || MSTEAMROLLER || MEXCAVATOR || MZEN || MZEN2 || MJAGUAR || MK7 || MCORE2 || MNEHALEM || MWESTMERE || MSILVERMONT || MGOLDMONT || MGOLDMONTPLUS || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MCASCADELAKE || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MCRUSOE || MEFFICEON || X86_64 || MNATIVE || MATOM || MGEODE_LX)

config X86_MINIMUM_CPU_FAMILY
int
--- a/arch/x86/Makefile 2018-04-01 17:20:27.000000000 -0400
+++ b/arch/x86/Makefile 2018-05-07 17:45:55.180101285 -0400
@@ -124,13 +124,47 @@ else
--- a/arch/x86/Makefile 2019-08-16 04:11:12.000000000 -0400
+++ b/arch/x86/Makefile 2019-08-22 16:01:22.559789904 -0400
@@ -118,13 +118,53 @@ else
KBUILD_CFLAGS += $(call cc-option,-mskip-rax-setup)

# FIXME - should be integrated in Makefile.cpu (Makefile_32.cpu)
Expand Down Expand Up @@ -520,6 +556,10 @@ REFERENCES
+ $(call cc-option,-march=westmere,$(call cc-option,-mtune=westmere))
+ cflags-$(CONFIG_MSILVERMONT) += \
+ $(call cc-option,-march=silvermont,$(call cc-option,-mtune=silvermont))
+ cflags-$(CONFIG_MGOLDMONT) += \
+ $(call cc-option,-march=goldmont,$(call cc-option,-mtune=goldmont))
+ cflags-$(CONFIG_MGOLDMONTPLUS) += \
+ $(call cc-option,-march=goldmont-plus,$(call cc-option,-mtune=goldmont-plus))
+ cflags-$(CONFIG_MSANDYBRIDGE) += \
+ $(call cc-option,-march=sandybridge,$(call cc-option,-mtune=sandybridge))
+ cflags-$(CONFIG_MIVYBRIDGE) += \
Expand All @@ -535,14 +575,16 @@ REFERENCES
+ cflags-$(CONFIG_MCANNONLAKE) += \
+ $(call cc-option,-march=cannonlake,$(call cc-option,-mtune=cannonlake))
+ cflags-$(CONFIG_MICELAKE) += \
+ $(call cc-option,-march=icelake,$(call cc-option,-mtune=icelake))
+ $(call cc-option,-march=icelake-client,$(call cc-option,-mtune=icelake-client))
+ cflags-$(CONFIG_MCASCADE) += \
+ $(call cc-option,-march=cascadelake,$(call cc-option,-mtune=cascadelake))
+ cflags-$(CONFIG_MATOM) += $(call cc-option,-march=bonnell) \
+ $(call cc-option,-mtune=bonnell,$(call cc-option,-mtune=generic))
cflags-$(CONFIG_GENERIC_CPU) += $(call cc-option,-mtune=generic)
KBUILD_CFLAGS += $(cflags-y)

--- a/arch/x86/Makefile_32.cpu 2018-04-01 17:20:27.000000000 -0400
+++ b/arch/x86/Makefile_32.cpu 2018-05-07 17:46:27.093434792 -0400
--- a/arch/x86/Makefile_32.cpu 2019-08-16 04:11:12.000000000 -0400
+++ b/arch/x86/Makefile_32.cpu 2019-08-22 16:02:14.687701216 -0400
@@ -23,7 +23,19 @@ cflags-$(CONFIG_MK6) += -march=k6
# Please note, that patches that add -march=athlon-xp and friends are pointless.
# They make zero difference whatsosever to performance at this time.
Expand All @@ -563,7 +605,7 @@ REFERENCES
cflags-$(CONFIG_MCRUSOE) += -march=i686 -falign-functions=0 -falign-jumps=0 -falign-loops=0
cflags-$(CONFIG_MEFFICEON) += -march=i686 $(call tune,pentium3) -falign-functions=0 -falign-jumps=0 -falign-loops=0
cflags-$(CONFIG_MWINCHIPC6) += $(call cc-option,-march=winchip-c6,-march=i586)
@@ -32,8 +44,19 @@ cflags-$(CONFIG_MCYRIXIII) += $(call cc-
@@ -32,8 +44,22 @@ cflags-$(CONFIG_MCYRIXIII) += $(call cc-
cflags-$(CONFIG_MVIAC3_2) += $(call cc-option,-march=c3-2,-march=i686)
cflags-$(CONFIG_MVIAC7) += -march=i686
cflags-$(CONFIG_MCORE2) += -march=i686 $(call tune,core2)
Expand All @@ -572,14 +614,17 @@ REFERENCES
+cflags-$(CONFIG_MNEHALEM) += -march=i686 $(call tune,nehalem)
+cflags-$(CONFIG_MWESTMERE) += -march=i686 $(call tune,westmere)
+cflags-$(CONFIG_MSILVERMONT) += -march=i686 $(call tune,silvermont)
+cflags-$(CONFIG_MGOLDMONT) += -march=i686 $(call tune,goldmont)
+cflags-$(CONFIG_MGOLDMONTPLUS) += -march=i686 $(call tune,goldmont-plus)
+cflags-$(CONFIG_MSANDYBRIDGE) += -march=i686 $(call tune,sandybridge)
+cflags-$(CONFIG_MIVYBRIDGE) += -march=i686 $(call tune,ivybridge)
+cflags-$(CONFIG_MHASWELL) += -march=i686 $(call tune,haswell)
+cflags-$(CONFIG_MBROADWELL) += -march=i686 $(call tune,broadwell)
+cflags-$(CONFIG_MSKYLAKE) += -march=i686 $(call tune,skylake)
+cflags-$(CONFIG_MSKYLAKEX) += -march=i686 $(call tune,skylake-avx512)
+cflags-$(CONFIG_MCANNONLAKE) += -march=i686 $(call tune,cannonlake)
+cflags-$(CONFIG_MICELAKE) += -march=i686 $(call tune,icelake)
+cflags-$(CONFIG_MICELAKE) += -march=i686 $(call tune,icelake-client)
+cflags-$(CONFIG_MCASCADELAKE) += -march=i686 $(call tune,cascadelake)
+cflags-$(CONFIG_MATOM) += $(call cc-option,-march=bonnell,$(call cc-option,-march=core2,-march=i686)) \
+ $(call cc-option,-mtune=bonnell,$(call cc-option,-mtune=generic))

Expand Down

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