riscv targets: fix RISCV_CPU typo

tum-ei-eda · Nov 15, 2024 · 921c66b · 921c66b
1 parent 1f9abf9
commit 921c66b
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/mlonmcu/target/riscv/riscv.py b/mlonmcu/target/riscv/riscv.py
@@ -365,7 +365,7 @@ def get_platform_defs(self, platform):
         #     ret["RISCV_ELF_GCC_BASENAME"] = self.pulp_gcc_basename
         ret["RISCV_ARCH"] = self.gcc_arch if self.toolchain == "gcc" else self.llvm_arch
         ret["RISCV_ABI"] = self.abi
-        ret["RISCV_MCPU"] = self.cpu
+        ret["RISCV_CPU"] = self.cpu
         # llvm/clang only!
         ret["RISCV_ATTR"] = self.attr
         ret["RISCV_LINUX"] = not self.is_bare  # TODO: add -static if linux gcc is used