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Aarch64 support #24

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Jan 24, 2021
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4 changes: 3 additions & 1 deletion .gitignore
Original file line number Diff line number Diff line change
@@ -1,3 +1,5 @@
*.pyc
.idea/
libcoldstart*
.vscode/
libcoldstart*
*.so
93 changes: 77 additions & 16 deletions patch.py
Original file line number Diff line number Diff line change
@@ -1,6 +1,7 @@
import os
import sys
import shutil
import struct

from elftools.elf.sections import SymbolTableSection
from elftools.elf.elffile import ELFFile
Expand Down Expand Up @@ -74,11 +75,27 @@ def __init__(self, stream, elf, arch, out_path):
self.out_path = out_path

def patch(self):
func_name = "_ZN8proxygen15SSLVerification17verifyWithMetricsEbP17x509_store_ctx_stRKSsPNS0_31SSLFailureVerificationCallbacksEPNS0_31SSLSuccessVerificationCallbacksERKNS_15TimeUtilGenericINSt6chrono3_V212steady_clockEEERNS_10TraceEventE"
func_file_offset = find_function(self.elf, func_name)
func_names =[
"_ZN8proxygen15SSLVerification17verifyWithMetricsEbP17x509_store_ctx_stRKSsPNS0_31SSLFailureVerificationCallbacksEPNS0_31SSLSuccessVerificationCallbacksERKNS_15TimeUtilGenericINSt6chrono3_V212steady_clockEEERNS_10TraceEventE",
"_ZN8proxygen15SSLVerification17verifyWithMetricsEbP17x509_store_ctx_stRKNSt6__ndk112basic_stringIcNS3_11char_traitsIcEENS3_9allocatorIcEEEEPNS0_31SSLFailureVerificationCallbacksEPNS0_31SSLSuccessVerificationCallbacksERKNS_15TimeUtilGenericINS3_6chrono12steady_clockEEERNS_10TraceEventE"
]
func_file_offset = -1
for i in range(len(func_names)):
try:
func_file_offset = find_function(self.elf, func_names[i])
break
except FuncNotFound:
if i + 1 == len(func_names):
raise
if arch == "ARM":
func_file_offset -= 1 # THUMB
code = [0x01, 0x20, 0xf7, 0x46] # movs r0, #1; mov pc, lr;
elif arch == 'AArch64':
asm = [
b"\x20\x00\x80\x52", # mov W0,1
b"\xc0\x03\x5f\xd6", # ret
]
code = list(b"".join(asm))
else: # x86
code = [0xb8, 0x01, 0x00, 0x00, 0x00, 0xc3] # mov eax, 0x1; ret;
bytes_written = patch_file(self.out_path, func_file_offset, code)
Expand Down Expand Up @@ -106,12 +123,13 @@ def patch(self):
We bypass the defense by NOPing the certificate verifier
"""
patch_offset = -1
code = None
text_section = elf.get_section_by_name(".text")
text_offset = text_section.header.sh_offset
f.seek(text_offset)
blob = f.read()

if self.arch == "ARM":
text_section = elf.get_section_by_name(".text")
text_offset = text_section.header.sh_offset
f.seek(text_offset)
blob = f.read()

# We look for "stable" opcodes as our signature - opcodes untouched by registers
for i in range(len(blob)):
# BX ADD BL LDR{Rn,0xC} CBZ
Expand All @@ -124,15 +142,52 @@ def patch(self):
code = [blob[i+10]>>3, 0b11100000]
patch_offset = text_offset + i + 10
break

else: # x86
code = b"\x90" * 22 # NOP sled

text_section = elf.get_section_by_name(".text")
text_offset = text_section.header.sh_offset
f.seek(text_offset)
blob = f.read()
elif self.arch == 'AArch64':
# Don't throw a FizzVerificationException
# https://github.com/facebookincubator/fizz/blob/a0751504e4f50d0c43764f92c2d289670e27aafa/fizz/client/ClientProtocol.cpp#L1810

# https://github.com/CAS-Atlantic/AArch64-Encoding
sig = (
# bitmask , opcode
(0xff00001f, 0b01010100_0000000000000000000_0_0001), # conditional branch opcode, imm19, 0, cond(ne) <B.NE>
(0xfc000000, 0b1_00101 << 26), # link, branch, imm26 <BL>
(0xff000000, 0b101_01010 << 24), # data processing - register, ORR <MOV>
(0xfc000000, 0b1_00101 << 26), # link, branch, imm26 <BL>
(0xfc000000, 0b1_00101 << 26), # link, branch, imm26 <BL>
(0xffc00000, 0b1111100100 << 22), # store register (unsigned immediate), <STR>
(0x9f000000, 0b1_00_10000 << 24), # op, immlo, data processing - immediate, immhi, Rd <ADRP>
(0xff000000, 0b10010001 << 24), # data processing - immediate add <ADD>
(0xff000000, 0b10010001 << 24), # data processing - immediate add <ADD>
(0xff000000, 0b10010001 << 24), # data processing - immediate add <ADD>
(0xfc000000, 0b1_00101 << 26), # link, branch, imm26 <BL>
(0xff800000, 0b010100101 << 23), # data processing - immediate move wide <MOV[Z]>
(0xff800000, 0b010100101 << 23), # data processing - immediate move wide <MOV[Z]>
(0xffc00000, 0b0111100100 << 22), # store register immediate <STRH>
(0xff000000, 0b10010001 << 24), # data processing - immediate add <ADD>
(0xff000000, 0b10010001 << 24), # data processing - immediate add <ADD>
(0xff000000, 0b101_01010 << 24), # data processing - register, ORR <MOV>
(0xfc000000, 0b1_00101 << 26), # link, branch, imm26 <BL>
(0x9f000000, 0b1_00_10000 << 24), # op, immlo, data processing - immediate, immhi, Rd <ADRP>
(0x9f000000, 0b1_00_10000 << 24), # op, immlo, data processing - immediate, immhi, Rd <ADRP>
(0xffc00000, 0b11111001_01 << 22), # load register unsigned immediate X variant <LDR>
(0xffc00000, 0b11111001_01 << 22), # load register unsigned immediate X variant <LDR>
(0xff000000,0b101_01010 << 24), # data processing - register, ORR <MOV>
(0xfc000000, 0b1_00101 << 26) # link, branch, imm26 <BL>
)
for i in range(0, len(blob)-len(sig), 4):
for j in range(0, len(sig)):
opcode = u32(blob[i+j*4:i+j*4+4])
mask, template = sig[j]
if opcode&mask==template:
patch_offset = text_offset + i
else:
patch_offset = -1
break
else:
code = p32(u32(blob[i:i+4])&0xFFFE|0xE) # change the condition from NE (0v0001) to AL (0b1110)
break
else: # x86
code = b"\x90" * 22 # NOP sled
# We look for "stable" opcodes as our signature - opcodes untouched by registers
for i in range(len(blob)):
# jz 0x18, mov, call, mov, mov, mov, mov, call
Expand All @@ -155,6 +210,11 @@ def patch(self):
bytes_written = patch_file(self.out_path, patch_offset, code)
print(f"[+] {bytes_written} bytes were overwritten!")

def u32(b):
return struct.unpack('I', b)[0]

def p32(i):
return struct.pack('I', i)

if __name__ == "__main__":
# Validate command line args
Expand All @@ -171,7 +231,8 @@ def patch(self):
# Validate input file
elf = ELFFile(f)
arch = elf.get_machine_arch()
if arch != "ARM" and arch != "x86":

if arch not in ("ARM", "x86", "AArch64"):
print("[!] ERROR: Unknown architecture in libcoldstart.so, this script only supports ARM and x86!")

shutil.copyfile(libcoldstart_path, new_path)
Expand Down