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I agree, that we need to make more clear these point. But the CPU could check if the instruction have a long literral reading the first 4 byte (bits M and L are 1) and then do a pc=pc+8 instead of a pc=pc+4
Zardoz89
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Feb 19, 2015
IFEQ %r1,0 ; condition is false
IFEQ %r1,0xBEBACAFE ; skip this, should take 2 cycles to skip
The current implementation takes only 1 cycle for the second instruction.
The specification is not clear, but the extra cycle sounds logic.
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