Docs: filling Syzygy connector columns first instead of rows

tinyvision-ai-inc · Jan 22, 2024 · 25346a4 · 25346a4
1 parent 4e40783
commit 25346a4
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Showing 4 changed files with 61 additions and 61 deletions.
diff --git a/Docs/syzygy/pod_a.tsv b/Docs/syzygy/pod_a.tsv
@@ -3,20 +3,20 @@
 3	SDA	SDA
 4	R_GA	I2C_ADR_SEL
 5	S0_D0P	DIFF0_P
-6	S1_D1P	DIFF1_PCLK_P
+6	S1_D1P	DIFF5_PCLK_P
 7	S2_D0N	DIFF0_N
-8	S3_D1N	DIFF1_PCLK_N
-9	S4_D2P	DIFF2_P
-10	S5_D3P	DIFF3_PCLK_P
-11	S6_D2N	DIFF2_N
-12	S7_D3N	DIFF3_PCLK_N
-13	S8_D4P	DIFF4_PCLK_P
-14	S9_D5P	DIFF5_PCLK_P
-15	S10_D4N	DIFF4_PCLK_N
+8	S3_D1N	DIFF5_PCLK_N
+9	S4_D2P	DIFF1_PCLK_N
+10	S5_D3P	
+11	S6_D2N	DIFF1_PCLK_P
+12	S7_D3N	
+13	S8_D4P	DIFF2_P
+14	S9_D5P	
+15	S10_D4N	DIFF2_N
 16	S11_D5N	
-17	S12_D6P	
+17	S12_D6P	DIFF3_PCLK_P
 18	S13_D7P	
-19	S14_D6N	
+19	S14_D6N	DIFF3_PCLK_N
 20	S15_D7N	
 21	S16	GPIO_0
 22	S17	GPIO_1
@@ -30,9 +30,9 @@
 30	S25	
 31	S26	
 32	S27	
-33	P2C_CLKP	
+33	P2C_CLKP	DIFF4_PCLK_P
 34	C2P_CLKP	
-35	P2C_CLKN	
+35	P2C_CLKN	DIFF4_PCLK_N
 36	C2P_CLKN	
 37	RSVD	
 38	RSVD	

diff --git a/Docs/syzygy/pod_b.tsv b/Docs/syzygy/pod_b.tsv
@@ -3,21 +3,21 @@
 3	SDA	SDA
 4	R_GA	I2C_ADR_SEL
 5	S0_D0P	DIFF6_P
-6	S1_D1P	DIFF7_PCLK_P
+6	S1_D1P	DIFF11_PCLK_P
 7	S2_D0N	DIFF6_N
-8	S3_D1N	DIFF7_PCLK_N
-9	S4_D2P	DIFF8_P
-10	S5_D3P	DIFF9_PCLK_P
-11	S6_D2N	DIFF8_N
-12	S7_D3N	DIFF9_PCLK_N
-13	S8_D4P	DIFF10_P
-14	S9_D5P	DIFF11_PCLK_P
-15	S10_D4N	DIFF10_N
-16	S11_D5N	DIFF11_PCLK_N
-17	S12_D6P	DIFF12_P
-18	S13_D7P	DIFF13_PCLK_P
-19	S14_D6N	DIFF12_N
-20	S15_D7N	DIFF13_PCLK_N
+8	S3_D1N	DIFF11_PCLK_N
+9	S4_D2P	DIFF7_PCLK_P
+10	S5_D3P	DIFF12_P
+11	S6_D2N	DIFF7_PCLK_N
+12	S7_D3N	DIFF12_N
+13	S8_D4P	DIFF8_P
+14	S9_D5P	DIFF13_PCLK_P
+15	S10_D4N	DIFF8_N
+16	S11_D5N	DIFF13_PCLK_N
+17	S12_D6P	DIFF10_P
+18	S13_D7P	
+19	S14_D6N	DIFF10_N
+20	S15_D7N	
 21	S16	GPIO_N8_GPLL_T
 22	S17	GPIO_M8_GPLL_C
 23	S18	GPIO_G8_PCLK_C
@@ -30,9 +30,9 @@
 30	S25	
 31	S26	
 32	S27	
-33	P2C_CLKP	
+33	P2C_CLKP	DIFF9_PCLK_P
 34	C2P_CLKP	
-35	P2C_CLKN	
+35	P2C_CLKN	DIFF9_PCLK_N
 36	C2P_CLKN	
 37	RSVD	
 38	RSVD	

diff --git a/Docs/syzygy/syzygy.tsv b/Docs/syzygy/syzygy.tsv
@@ -4,21 +4,21 @@
 3	SDA	-	-	-	-	-	SDA	SDA
 4	R_GA	-	-	-	-	-	I2C_ADR_SEL	I2C_ADR_SEL
 5	S0_D0P	SLVS0_P	DB0	OUT1A+	RX_CTL	CAM1_CLK_P	DIFF0_P	DIFF6_P
-6	S1_D1P	FLASH	DB1	FR+	RESET_ENET_N	CAM2_LANE0_P	DIFF1_PCLK_P	DIFF7_PCLK_P
+6	S1_D1P	FLASH	DB1	FR+	RESET_ENET_N	CAM2_LANE0_P	DIFF5_PCLK_P	DIFF11_PCLK_P
 7	S2_D0N	SLVS0_N	DB2	OUT1A-	TX_CTL	CAM1_CLK_N	DIFF0_N	DIFF6_N
-8	S3_D1N	RESET_B	DB3	FR-	INT_N	CAM2_LANE0_N	DIFF1_PCLK_N	DIFF7_PCLK_N
-9	S4_D2P	SLVS1_P	DB4	OUT1B+	RXD3	CAM1_LANE0_P	DIFF2_P	DIFF8_P
-10	S5_D3P	TRIGGER	DB5	OUT2A+	TXD0	CAM3_CLK_P	DIFF3_PCLK_P	DIFF9_PCLK_P
-11	S6_D2N	SLVS1_N	DB6	OUT1B-	RXD2	CAM1_LANE0_N	DIFF2_N	DIFF8_N
-12	S7_D3N	SHUTTER	DB7	OUT2A-	TXD1	CAM3_CLK_N	DIFF3_PCLK_N	DIFF9_PCLK_N
-13	S8_D4P	SLVS2_P	DB8	SDO	RXD1	CAM1_LANE1_P	DIFF4_PCLK_P	DIFF10_P
-14	S9_D5P	FOCUS_SDA	DB9	OUT2B+	TXD2	CAM2_LANE1_P	DIFF5_PCLK_P	DIFF11_PCLK_P
-15	S10_D4N	SLVS2_N	DB10	CS_B	RXD0	CAM1_LANE1_N	DIFF4_PCLK_N	DIFF10_N
-16	S11_D5N	FOCUS_SCL	DB11	OUT2B-	TXD3	CAM2_LANE1_N	-	DIFF11_PCLK_N
-17	S12_D6P	SLVS3_P	CS_B/PWRDN	SCLK	EEPROM_SCL	CAM2_CLK_P	-	DIFF12_P
-18	S13_D7P	FOCUS_SDI	SCLK/CLKMD	-	MDC	CAM3_LANE0_P	-	DIFF13_PCLK_P
-19	S14_D6N	SLVS3_N	SDIO/FORMAT	SDI	EEPROM_SDA	CAM2_CLK_N	-	DIFF12_N
-20	S15_D7N	FOCUS_SDO	OPAMP_ENABLE	-	MDIO	CAM3_LANE0_N	-	DIFF13_PCLK_N
+8	S3_D1N	RESET_B	DB3	FR-	INT_N	CAM2_LANE0_N	DIFF5_PCLK_N	DIFF11_PCLK_N
+9	S4_D2P	SLVS1_P	DB4	OUT1B+	RXD3	CAM1_LANE0_P	DIFF1_PCLK_N	DIFF7_PCLK_P
+10	S5_D3P	TRIGGER	DB5	OUT2A+	TXD0	CAM3_CLK_P	-	DIFF12_P
+11	S6_D2N	SLVS1_N	DB6	OUT1B-	RXD2	CAM1_LANE0_N	DIFF1_PCLK_P	DIFF7_PCLK_N
+12	S7_D3N	SHUTTER	DB7	OUT2A-	TXD1	CAM3_CLK_N	-	DIFF12_N
+13	S8_D4P	SLVS2_P	DB8	SDO	RXD1	CAM1_LANE1_P	DIFF2_P	DIFF8_P
+14	S9_D5P	FOCUS_SDA	DB9	OUT2B+	TXD2	CAM2_LANE1_P	-	DIFF13_PCLK_P
+15	S10_D4N	SLVS2_N	DB10	CS_B	RXD0	CAM1_LANE1_N	DIFF2_N	DIFF8_N
+16	S11_D5N	FOCUS_SCL	DB11	OUT2B-	TXD3	CAM2_LANE1_N	-	DIFF13_PCLK_N
+17	S12_D6P	SLVS3_P	CS_B/PWRDN	SCLK	EEPROM_SCL	CAM2_CLK_P	DIFF3_PCLK_P	DIFF10_P
+18	S13_D7P	FOCUS_SDI	SCLK/CLKMD	-	MDC	CAM3_LANE0_P	-	-
+19	S14_D6N	SLVS3_N	SDIO/FORMAT	SDI	EEPROM_SDA	CAM2_CLK_N	DIFF3_PCLK_N	DIFF10_N
+20	S15_D7N	FOCUS_SDO	OPAMP_ENABLE	-	MDIO	CAM3_LANE0_N	-	-
 21	S16	SDATA	RESET/PINMD	-	-	CAM1_GPIO0_VIO	GPIO_0	GPIO_N8_GPLL_T
 22	S17	FOCUS_SCK	-	-	-	CAM1_SCL_VIO	GPIO_1	GPIO_M8_GPLL_C
 23	S18	SCLK	-	-	-	CAM1_GPIO1_VIO	GPIO_2	GPIO_G8_PCLK_C
@@ -31,9 +31,9 @@
 30	S25	-	-	-	-	CAM3_SCL_VIO	-	-
 31	S26	-	-	-	-	CAM3_GPIO1_VIO	-	-
 32	S27	-	-	-	-	CAM3_SDA_VIO	-	-
-33	P2C_CLKP	SLVSC_P	DCLKIO	DCO+	RX_CLK	CAM3_LANE1_P	-	-
+33	P2C_CLKP	SLVSC_P	DCLKIO	DCO+	RX_CLK	CAM3_LANE1_P	DIFF4_PCLK_P	DIFF9_PCLK_P
 34	C2P_CLKP	EXTCLK	CLKIN	ENC+	TX_CLK	GPIO1_DIR	-	-
-35	P2C_CLKN	SLVSC_N	-	DCO-	-	CAM3_LANE1_N	-	-
+35	P2C_CLKN	SLVSC_N	-	DCO-	-	CAM3_LANE1_N	DIFF4_PCLK_N	DIFF9_PCLK_N
 36	C2P_CLKN	-	-	ENC-	-	-	-	-
 37	RSVD	-	-	-	-	-	-	-
 38	RSVD	-	-	-	-	-	-	-

diff --git a/Docs/syzygy/syzygy.txt b/Docs/syzygy/syzygy.txt
@@ -4,21 +4,21 @@
 3   SDA       -            -               -                -             -               SDA           SDA
 4   R_GA      -            -               -                -             -               I2C_ADR_SEL   I2C_ADR_SEL
 5   S0_D0P    SLVS0_P      DB0             OUT1A+           RX_CTL        CAM1_CLK_P      DIFF0_P       DIFF6_P
-6   S1_D1P    FLASH        DB1             FR+              RESET_ENET_N  CAM2_LANE0_P    DIFF1_PCLK_P  DIFF7_PCLK_P
+6   S1_D1P    FLASH        DB1             FR+              RESET_ENET_N  CAM2_LANE0_P    DIFF5_PCLK_P  DIFF11_PCLK_P
 7   S2_D0N    SLVS0_N      DB2             OUT1A-           TX_CTL        CAM1_CLK_N      DIFF0_N       DIFF6_N
-8   S3_D1N    RESET_B      DB3             FR-              INT_N         CAM2_LANE0_N    DIFF1_PCLK_N  DIFF7_PCLK_N
-9   S4_D2P    SLVS1_P      DB4             OUT1B+           RXD3          CAM1_LANE0_P    DIFF2_P       DIFF8_P
-10  S5_D3P    TRIGGER      DB5             OUT2A+           TXD0          CAM3_CLK_P      DIFF3_PCLK_P  DIFF9_PCLK_P
-11  S6_D2N    SLVS1_N      DB6             OUT1B-           RXD2          CAM1_LANE0_N    DIFF2_N       DIFF8_N
-12  S7_D3N    SHUTTER      DB7             OUT2A-           TXD1          CAM3_CLK_N      DIFF3_PCLK_N  DIFF9_PCLK_N
-13  S8_D4P    SLVS2_P      DB8             SDO              RXD1          CAM1_LANE1_P    DIFF4_PCLK_P  DIFF10_P
-14  S9_D5P    FOCUS_SDA    DB9             OUT2B+           TXD2          CAM2_LANE1_P    DIFF5_PCLK_P  DIFF11_PCLK_P
-15  S10_D4N   SLVS2_N      DB10            CS_B             RXD0          CAM1_LANE1_N    DIFF4_PCLK_N  DIFF10_N
-16  S11_D5N   FOCUS_SCL    DB11            OUT2B-           TXD3          CAM2_LANE1_N    -             DIFF11_PCLK_N
-17  S12_D6P   SLVS3_P      CS_B/PWRDN      SCLK             EEPROM_SCL    CAM2_CLK_P      -             DIFF12_P
-18  S13_D7P   FOCUS_SDI    SCLK/CLKMD      -                MDC           CAM3_LANE0_P    -             DIFF13_PCLK_P
-19  S14_D6N   SLVS3_N      SDIO/FORMAT     SDI              EEPROM_SDA    CAM2_CLK_N      -             DIFF12_N
-20  S15_D7N   FOCUS_SDO    OPAMP_ENABLE    -                MDIO          CAM3_LANE0_N    -             DIFF13_PCLK_N
+8   S3_D1N    RESET_B      DB3             FR-              INT_N         CAM2_LANE0_N    DIFF5_PCLK_N  DIFF11_PCLK_N
+9   S4_D2P    SLVS1_P      DB4             OUT1B+           RXD3          CAM1_LANE0_P    DIFF1_PCLK_N  DIFF7_PCLK_P
+10  S5_D3P    TRIGGER      DB5             OUT2A+           TXD0          CAM3_CLK_P      -             DIFF12_P
+11  S6_D2N    SLVS1_N      DB6             OUT1B-           RXD2          CAM1_LANE0_N    DIFF1_PCLK_P  DIFF7_PCLK_N
+12  S7_D3N    SHUTTER      DB7             OUT2A-           TXD1          CAM3_CLK_N      -             DIFF12_N
+13  S8_D4P    SLVS2_P      DB8             SDO              RXD1          CAM1_LANE1_P    DIFF2_P       DIFF8_P
+14  S9_D5P    FOCUS_SDA    DB9             OUT2B+           TXD2          CAM2_LANE1_P    -             DIFF13_PCLK_P
+15  S10_D4N   SLVS2_N      DB10            CS_B             RXD0          CAM1_LANE1_N    DIFF2_N       DIFF8_N
+16  S11_D5N   FOCUS_SCL    DB11            OUT2B-           TXD3          CAM2_LANE1_N    -             DIFF13_PCLK_N
+17  S12_D6P   SLVS3_P      CS_B/PWRDN      SCLK             EEPROM_SCL    CAM2_CLK_P      DIFF3_PCLK_P  DIFF10_P
+18  S13_D7P   FOCUS_SDI    SCLK/CLKMD      -                MDC           CAM3_LANE0_P    -             -
+19  S14_D6N   SLVS3_N      SDIO/FORMAT     SDI              EEPROM_SDA    CAM2_CLK_N      DIFF3_PCLK_N  DIFF10_N
+20  S15_D7N   FOCUS_SDO    OPAMP_ENABLE    -                MDIO          CAM3_LANE0_N    -             -
 21  S16       SDATA        RESET/PINMD     -                -             CAM1_GPIO0_VIO  GPIO_0        GPIO_N8_GPLL_T
 22  S17       FOCUS_SCK    -               -                -             CAM1_SCL_VIO    GPIO_1        GPIO_M8_GPLL_C
 23  S18       SCLK         -               -                -             CAM1_GPIO1_VIO  GPIO_2        GPIO_G8_PCLK_C
@@ -31,9 +31,9 @@
 30  S25       -            -               -                -             CAM3_SCL_VIO    -             -
 31  S26       -            -               -                -             CAM3_GPIO1_VIO  -             -
 32  S27       -            -               -                -             CAM3_SDA_VIO    -             -
-33  P2C_CLKP  SLVSC_P      DCLKIO          DCO+             RX_CLK        CAM3_LANE1_P    -             -
+33  P2C_CLKP  SLVSC_P      DCLKIO          DCO+             RX_CLK        CAM3_LANE1_P    DIFF4_PCLK_P  DIFF9_PCLK_P
 34  C2P_CLKP  EXTCLK       CLKIN           ENC+             TX_CLK        GPIO1_DIR       -             -
-35  P2C_CLKN  SLVSC_N      -               DCO-             -             CAM3_LANE1_N    -             -
+35  P2C_CLKN  SLVSC_N      -               DCO-             -             CAM3_LANE1_N    DIFF4_PCLK_N  DIFF9_PCLK_N
 36  C2P_CLKN  -            -               ENC-             -             -               -             -
 37  RSVD      -            -               -                -             -               -             -
 38  RSVD      -            -               -                -             -               -             -