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conda fails to install python=36 (verification error) #22

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ewenmcneill opened this issue Feb 7, 2018 · 6 comments
Closed

conda fails to install python=36 (verification error) #22

ewenmcneill opened this issue Feb 7, 2018 · 6 comments

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@ewenmcneill
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On an Ubuntu 16.04 system which had previously had litex-buildenv installed, updating to the latest commit (52f75717ac6) which switches to python-36 results in a system that:

  • Fails scripts/enter-env.sh because python 3.6 is missing; and

  • Fails scripts/download-env.sh because conda fails to install python 3.6 due to CondaVerificationError on seemingly every single python file, eg

    CondaVerificationError: The package for chardet located at /src/fpga-miniconf/litex-buildenv/build/conda/pkgs/chardet-3.0.4-py36h0f667ec_1
    appears to be corrupted. The path 'lib/python3.6/site-packages/chardet/pycache/init.cpython-36.pyc'
    specified in the package manifest cannot be found.

(see also gist with full output).

From some reading (eg, conda/conda-build#1301, conda/conda#6033, conda-forge/python-feedstock#70) my current guess is that perhaps this was an issue with an older version of conda, and then the bug got fixed, and everyone moved on. However it appears that scripts/download-env.sh will only ever update conda on first installation (from miniconda) and then after that assumes that the installed version will work perfectly; see

echo "Installing conda (self contained Python environment with binary package support)"
if [[ ! -e $CONDA_DIR/bin/conda ]]; then
cd $BUILD_DIR
# FIXME: Get the miniconda people to add a "self check" mode
wget --no-verbose --continue https://repo.continuum.io/miniconda/Miniconda3-latest-Linux-x86_64.sh
chmod a+x Miniconda3-latest-Linux-x86_64.sh
# -p to specify the install location
# -b to enable batch mode (no prompts)
# -f to not return an error if the location specified by -p already exists
./Miniconda3-latest-Linux-x86_64.sh -p $CONDA_DIR -b -f
fix_conda
conda config --system --set always_yes yes
conda config --system --set changeps1 no
conda config --system --add envs_dirs $CONDA_DIR/envs
conda config --system --add pkgs_dirs $CONDA_DIR/pkgs
conda update -q conda
fi

(and note the conda ... update is guarded by if no bin/conda exists, so it'll only happen once).

I'm about to try manually doing conda update conda and see if that is sufficient to fix the issue. But am making an issue now as a record in case others run into the same issue...

Ewen

@ewenmcneill
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conda update conda fails in basically the same way; many many reports of __pycache__/*.cpython-36.pyc, eg:

(LX P=arty C=or1k.linux F=linux R=in-tftpd-fix) ewen@parthenon:/src/fpga-minicon
f/litex-buildenv$ conda update conda
Solving environment: done

## Package Plan ##

  environment location: /src/fpga-miniconf/litex-buildenv/build/conda

  added / updated specs: 
    - conda


The following packages will be UPDATED:

    asn1crypto:       0.24.0-py35_0            --> 0.24.0-py36_0         
    certifi:          2017.11.5-py35h9749603_0 --> 2018.1.18-py36_0      
    cffi:             1.11.2-py35hc7b2db7_0    --> 1.11.4-py36h9745a5d_0 
    chardet:          3.0.4-py35hb6e9ddf_1     --> 3.0.4-py36h0f667ec_1  
    conda:            4.4.7-py35_0             --> 4.4.8-py36_0          
    cryptography:     2.1.4-py35hbeb2da1_0     --> 2.1.4-py36hd09be54_0  
    decorator:        4.1.2-py35h3a268aa_0     --> 4.2.1-py36_0          
    idna:             2.6-py35h8605a33_1       --> 2.6-py36h82fb2a8_1    
    ipython:          6.2.1-py35hd850d2a_1     --> 6.2.1-py36h88c514a_1  
    ipython_genutils: 0.2.0-py35hc9e07d0_0     --> 0.2.0-py36hb52b0d5_0  
    jedi:             0.11.0-py35_2            --> 0.11.1-py36_0         
    parso:            0.1.1-py35h1b200a3_0     --> 0.1.1-py36h35f843b_0  
    pexpect:          4.3.1-py35_0             --> 4.3.1-py36_0          
    pickleshare:      0.7.4-py35hd57304d_0     --> 0.7.4-py36h63277f8_0  
    pip:              9.0.1-py35h7e7da9d_4     --> 9.0.1-py36h6c6f9ce_4  
    prompt_toolkit:   1.0.15-py35hc09de7a_0    --> 1.0.15-py36h17d85b1_0 
    ptyprocess:       0.5.2-py35h38ce0a3_0     --> 0.5.2-py36h69acd42_0  
    pycosat:          0.6.3-py35h6b6bb97_0     --> 0.6.3-py36h0a5515d_0  
    pycparser:        2.18-py35h61b3040_1      --> 2.18-py36hf9f622e_1   
    pygments:         2.2.0-py35h0f41973_0     --> 2.2.0-py36h0d3125c_0  
    pyopenssl:        17.5.0-py35h4f8b8c8_0    --> 17.5.0-py36h20ba746_0 
    pyserial:         3.4-py35h84edd1e_0       --> 3.4-py36h08da44b_0    
    pysocks:          1.6.7-py35h6aefbb0_1     --> 1.6.7-py36hd97a5b1_1  
    python:           3.5.4-h417fded_24        --> 3.6.0-0               
    requests:         2.18.4-py35hb9e6ad1_1    --> 2.18.4-py36he2e5f8d_1 
    ruamel_yaml:      0.11.14-py35h8e2c16b_2   --> 0.15.35-py36h14c3975_1
    setuptools:       36.5.0-py35ha8c1747_0    --> 38.4.0-py36_0         
    simplegeneric:    0.8.1-py35h2ec4104_0     --> 0.8.1-py36h2cb9092_0  
    six:              1.11.0-py35h423b573_1    --> 1.11.0-py36h372c433_1 
    traitlets:        4.3.2-py35ha522a97_0     --> 4.3.2-py36h674d592_0  
    urllib3:          1.22-py35h2ab6e29_0      --> 1.22-py36hbe7ace6_0   
    wcwidth:          0.1.7-py35hcd08066_0     --> 0.1.7-py36hdf4376a_0  
    wheel:            0.30.0-py35hd3883cf_1    --> 0.30.0-py36hfd4bba0_1 

The following packages will be DOWNGRADED:

    readline:         7.0-ha6073c6_4           --> 6.2-2                 
    sqlite:           3.20.1-hb898158_2        --> 3.13.0-0              
    tk:               8.6.7-hc745277_3         --> 8.5.18-0              

Preparing transaction: done
Verifying transaction: failed

CondaVerificationError: The package for chardet located at /src/fpga-miniconf/litex-buildenv/build/conda/pkgs/chardet-3.0.4-py36h0f667ec_1
appears to be corrupted. The path 'lib/python3.6/site-packages/chardet/__pycache__/__init__.cpython-36.pyc'
specified in the package manifest cannot be found.
[...]

And digging further, these paths are indeed specified within the info/paths.json in the conda packages:

ewen@parthenon:/src/fpga-miniconf/litex-buildenv/build/conda$ find . -name "paths.json" | xargs grep "__pycache__/.*python-36.pyc" | head
./pkgs/chardet-3.0.4-py36h0f667ec_1/info/paths.json:      "_path": "lib/python3.6/site-packages/chardet/__pycache__/__init__.cpython-36.pyc",
./pkgs/chardet-3.0.4-py36h0f667ec_1/info/paths.json:      "_path": "lib/python3.6/site-packages/chardet/__pycache__/big5freq.cpython-36.pyc",
./pkgs/chardet-3.0.4-py36h0f667ec_1/info/paths.json:      "_path": "lib/python3.6/site-packages/chardet/__pycache__/big5prober.cpython-36.pyc",
./pkgs/chardet-3.0.4-py36h0f667ec_1/info/paths.json:      "_path": "lib/python3.6/site-packages/chardet/__pycache__/chardistribution.cpython-36.pyc",
./pkgs/chardet-3.0.4-py36h0f667ec_1/info/paths.json:      "_path": "lib/python3.6/site-packages/chardet/__pycache__/charsetgroupprober.cpython-36.pyc",
./pkgs/chardet-3.0.4-py36h0f667ec_1/info/paths.json:      "_path": "lib/python3.6/site-packages/chardet/__pycache__/charsetprober.cpython-36.pyc",
./pkgs/chardet-3.0.4-py36h0f667ec_1/info/paths.json:      "_path": "lib/python3.6/site-packages/chardet/__pycache__/codingstatemachine.cpython-36.pyc",
./pkgs/chardet-3.0.4-py36h0f667ec_1/info/paths.json:      "_path": "lib/python3.6/site-packages/chardet/__pycache__/compat.cpython-36.pyc",
./pkgs/chardet-3.0.4-py36h0f667ec_1/info/paths.json:      "_path": "lib/python3.6/site-packages/chardet/__pycache__/cp949prober.cpython-36.pyc",
./pkgs/chardet-3.0.4-py36h0f667ec_1/info/paths.json:      "_path": "lib/python3.6/site-packages/chardet/__pycache__/enums.cpython-36.pyc",
xargs: grep: terminated by signal 13
ewen@parthenon:/src/fpga-miniconf/litex-buildenv/build/conda$ 

although interestingly they're supposed to be a hardlink:

    {
      "_path": "lib/python3.6/site-packages/chardet/__pycache__/__init__.cpython-36.pyc",
      "path_type": "hardlink",
      "sha256": "2f491902f2616b7cf6d0dcfd1ef838edfe8533a27c8d825a02e9a77d744570a8",
      "size_in_bytes": 782
    },

I have no lib/python3.6:

ewen@parthenon:/src/fpga-miniconf/litex-buildenv/build/conda$ ls -d lib/python*
lib/python3.5
ewen@parthenon:/src/fpga-miniconf/litex-buildenv/build/conda$ 

(presumably because this install attempt fails).

Ewen

@ewenmcneill
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In case it helps, I have conda 4.4.7 installed, using Python 3.5, along with these packages:

(LX P=arty C=or1k.linux F=linux R=in-tftpd-fix) ewen@parthenon:/src/fpga-minicon
f/litex-buildenv$ conda --version
conda 4.4.7
(LX P=arty C=or1k.linux F=linux R=in-tftpd-fix) ewen@parthenon:/src/fpga-minicon
f/litex-buildenv$ conda list
# packages in environment at /src/fpga-miniconf/litex-buildenv/build/conda:
#
asn1crypto                0.24.0                   py35_0  
binutils-lm32-elf         2.28.0          20180115_065451    timvideos
binutils-or1k-elf         2.28.0          20180108_070246    timvideos
ca-certificates           2017.08.26           h1d4fec5_0  
certifi                   2017.11.5        py35h9749603_0  
cffi                      1.11.2           py35hc7b2db7_0  
chardet                   3.0.4            py35hb6e9ddf_1  
cloog                     0.18.0                        0  
colorama                  0.3.9                     
conda                     4.4.7                    py35_0  
conda-env                 2.6.0                h36134e3_1  
cryptography              2.1.4            py35hbeb2da1_0  
decorator                 4.1.2            py35h3a268aa_0  
flterm                    2.4_24_gee93960               0    timvideos
gcc-lm32-elf-newlib       5.4.0           20171225_070346    timvideos
gcc-lm32-elf-nostdc       5.4.0           20171211_070518    timvideos
gcc-or1k-elf-newlib       5.4.0_4334_g9310fdc97ee 20171211_071240    timvideos
gcc-or1k-elf-nostdc       5.4.0_4334_g9310fdc97ee 20171211_071023    timvideos
gmp                       6.1.2                h6c8ec71_1  
hdmi2usb.modeswitch       0.0.1                     
hexfile                   0.1.1                     
idna                      2.6              py35h8605a33_1  
ipython                   6.2.1            py35hd850d2a_1  
ipython_genutils          0.2.0            py35hc9e07d0_0  
isl                       0.12.2                        0  
jedi                      0.11.0                   py35_2  
libedit                   3.1                  heed3624_0  
libffi                    3.2.1                hd88cf55_4  
libgcc-ng                 7.2.0                h7cc24e2_2  
libstdcxx-ng              7.2.0                h7a57d05_2  
litedram                  0.1                       
liteeth                   0.1                       
litepcie                  1.0                       
litesata                  1.0                       
litescope                 0.1                       
liteusb                   0.1                       
litevideo                 0.1                       
litex                     0.1                       
mpc                       1.0.3                hec55b23_5  
mpfr                      3.1.5                h11a74b3_2  
ncurses                   6.0                  h9df7e31_2  
openocd                   0.10.0_267_gf7836bbc7   20180115_0740    timvideos
openssl                   1.0.2n               hb7f436b_0  
parso                     0.1.1            py35h1b200a3_0  
pexpect                   4.3.1                    py35_0  
pickleshare               0.7.4            py35hd57304d_0  
pip                       9.0.1            py35h7e7da9d_4  
progressbar2              3.34.3                    
prompt_toolkit            1.0.15           py35hc09de7a_0  
ptyprocess                0.5.2            py35h38ce0a3_0  
pycosat                   0.6.3            py35h6b6bb97_0  
pycparser                 2.18             py35h61b3040_1  
pygments                  2.2.0            py35h0f41973_0  
pyopenssl                 17.5.0           py35h4f8b8c8_0  
pyserial                  3.4              py35h84edd1e_0  
pysocks                   1.6.7            py35h6aefbb0_1  
python                    3.5.4               h417fded_24  
python-utils              2.2.0                     
readline                  7.0                  ha6073c6_4  
requests                  2.18.4           py35hb9e6ad1_1  
ruamel_yaml               0.11.14          py35h8e2c16b_2  
setuptools                36.5.0           py35ha8c1747_0  
simplegeneric             0.8.1            py35h2ec4104_0  
six                       1.11.0           py35h423b573_1  
sqlite                    3.20.1               hb898158_2  
tk                        8.6.7                hc745277_3  
traitlets                 4.3.2            py35ha522a97_0  
urllib3                   1.22             py35h2ab6e29_0  
wcwidth                   0.1.7            py35hcd08066_0  
wheel                     0.30.0           py35hd3883cf_1  
xz                        5.2.3                h55aa19d_2  
yaml                      0.1.7                had09818_2  
zlib                      1.2.11               ha838bed_2  
(LX P=arty C=or1k.linux F=linux R=in-tftpd-fix) ewen@parthenon:/src/fpga-minicon
f/litex-buildenv$ 

all of which are notably the py35 versions rather than the py36 versions...

Ewen

@ewenmcneill
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If I remove conda-meta/pinned, which scripts/download-env.sh sets to python ==3.6, then I can successfully update conda to the latest version 4.4.8:

(LX P=arty C=or1k.linux F=linux R=in-tftpd-fix) ewen@parthenon:/src/fpga-minicon
f/litex-buildenv$ conda update conda
Solving environment: done

## Package Plan ##

  environment location: /src/fpga-miniconf/litex-buildenv/build/conda

  added / updated specs: 
    - conda


The following packages will be downloaded:

    package                    |            build
    ---------------------------|-----------------
    conda-4.4.8                |           py35_0         937 KB
    certifi-2018.1.18          |           py35_0         143 KB
    ------------------------------------------------------------
                                           Total:         1.1 MB

The following packages will be UPDATED:

    certifi: 2017.11.5-py35h9749603_0 --> 2018.1.18-py35_0
    conda:   4.4.7-py35_0             --> 4.4.8-py35_0    


Downloading and Extracting Packages
conda 4.4.8: ########################################################### | 100% 
certifi 2018.1.18: ##################################################### | 100% 
Preparing transaction: done
Verifying transaction: done
Executing transaction: done
(LX P=arty C=or1k.linux F=linux R=in-tftpd-fix) ewen@parthenon:/src/fpga-minicon
f/litex-buildenv$ 

Unfortunately then conda install python=3.6 then fails in pretty much the same way as before, even without the pinned version, because it still wants to update all the py35 packages, and fails because the pyc files it expects aren't found :-(

Ewen

@ewenmcneill
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It appears others have had this sort of problem before, although not precisely like this:

and the fix they chose was basically "throw away that environment and start again". It looks like in theory upgrading python is now supposed to work (eg, documented at https://conda.io/docs/user-guide/tasks/manage-python.html#updating-or-upgrading-python), but in practice it's not clear that it will actually manage a major version transition with dependent packages...

Ewen

@ewenmcneill
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After concluding that reinstalling the conda environment was going to be quicker, I did:

mv build/conda build/conda-3.5
# set environment variables
scripts/download-env.sh

and it seemed to work perfectly. I assume the python=3.5 to python=3.6 upgrade process isn't very well tested. I did briefly try to find a combination of conda packages I could remove to avoid the .pyc complaints... but a bunch that I tried were conda dependencies, and unsurprisingly conda is unwilling to remove itself, so I gave up on that approach.

FTR, output of reinstalling after mv build/conda build/conda-3.5. At least with a fast network connection it took only a few minutes -- way less time than I spent trying to make it work without doing that :-) (And it might have been faster if I had, eg, found a way to save conda/pkgs/ or similar.)

Ewen

@mithro
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mithro commented Aug 27, 2018

I'm going to close this as we have moved to Python 3.6 now....

@mithro mithro closed this as completed Aug 27, 2018
mithro added a commit that referenced this issue Feb 15, 2019
 * litedram changed from 906edf1 to d89b171
    * d89b171 - modules/mt40a1g8: use _L (long) timings <Florent Kermarrec>
    * 2d4fdd1 - litedram/sdram_init/ddr4: disable data mask (not required) <Florent Kermarrec>
    *   0b49cbb - Merge pull request #74 from softerhardware/master <enjoy-digital>
    |\
    | * d65377f - Update to MT40A1G8 that Phillip was successful with <Steve Haynal - VSD Engineering>
    * | f207454 - sdram_init/ddr4: set data mask enable bit <Florent Kermarrec>
    * |   6d09a47 - Merge pull request #73 from softerhardware/master <enjoy-digital>
    |\ \
    | |/
    | * 8e6ad4c - Additional DDR3 and DDR4 SDRAMModules <Steve Haynal - VSD Engineering>
    * | 92df55f - travis: change tests order, comment test_examples for now (need to install the CPU toolchain to travis) <Florent Kermarrec>
    |/
    * 2d4b5ba - core/crossbar: cosmetic <Florent Kermarrec>
    * 429d3a8 - test/common: set rdata_valid_rand_level default value to 0 <Florent Kermarrec>
    * 9ddb3e2 - travis: set python version to 3.6 <Florent Kermarrec>
    *   cc38804 - Merge pull request #72 from EwoutH/master <enjoy-digital>
    |\
    | * 8e01cba - Add Travis CI (#1) <Ewout ter Hoeven>
    |/
    * 031746a - frontend/bist: fix for data_width < 31 (16 bits SDRAMs) <Florent Kermarrec>
    * b4c552a - core/multiplexer: fix command steering for nphases=1 (SDRAM), thanks jfng <Florent Kermarrec>
    * 224a423 - common: allow setting electrical settings with DDR4 <Florent Kermarrec>
    * fc3a192 - phy/gensdrphy: make CAS latency configurable <Florent Kermarrec>
    * b4ee95c - sdram_init: generate ddrx_mr1 only if mr1 is not None <Florent Kermarrec>
    * 2483d25 - test/test_ecc: update <Florent Kermarrec>
    * 6757a14 - frontend/ecc: add error injection capability <Florent Kermarrec>
    * 7eee80d - frontend/ecc: add description, rename dec signal to ded <Florent Kermarrec>
    * 14c6062 - core/crossbar: remove "ROW_COL_BANK" address_mapping (need to be simulated) <Florent Kermarrec>
    * 180b3d2 - modules: adjust MT48LC16M16 timings <Florent Kermarrec>

 * liteeth changed from d7fdcbb to 77fa4bf
    * 77fa4bf - phy: add Kintex7 1000BaseX PHY <Florent Kermarrec>
    * c2d8a46 - phy: add Kintex Ultrascale PHY (copyright M-Labs Ltd) <Florent Kermarrec>

 * litepcie changed from b29c3a0 to 3804c49
    * 3804c49 - frontend/dma: use max_request_size constant for DMAReader <Florent Kermarrec>
    * 3c4eb61 - core/msi: don't wait retransmit timer when irq vector changes <Florent Kermarrec>
    * 4196708 - core/tlp: expose tags/tlp_req/tlp_cmp <Florent Kermarrec>
    * 324ab72 - examples/targets: update crg with new phy (can't use pcie rst) <Florent Kermarrec>
    * 14acea3 - software/linux/kernel/main: fix compilation on 4.11.0 and > kernels (thanks nanortemis) <Florent Kermarrec>
    * b304a7a - software/linux/user: update dump_version <Florent Kermarrec>

 * litescope changed from 1634fa3 to c1d8bdf
    * c1d8bdf - core: fix Trigger flush when disabled <Florent Kermarrec>

 * litevideo changed from 0993a4e to 98e145f
    * 98e145f - Merge pull request #22 from rohitk-singh/regression-fix <enjoy-digital>
    * 411669b - input/clocking/S7Clocking: fix clock-domains when split_clocking=False <Rohit Singh>
    * 17ebc03 - output/hdmi: fix incorrect clock domain in S7HDMIOutEncoderSerializer <Rohit Singh>
    * 1e51823 - driver/hdmi: fix sink connection <Rohit Singh>

 * litex changed from v0.1-679-ga7378a72 to v0.1-710-gaf52842f
    * af52842f - soc_sdram: add use_full_memory_we parameter to allow disabling vivado workaround on small l2 caches <Florent Kermarrec>
    * 32543430 - build/lattice/common/LatticeECXTrellisImpl: add support for nbits == 1 <Florent Kermarrec>
    * aabf042d - soc_sdram: don't generate sdram initialization error message when integrated_main_ram is used <Florent Kermarrec>
    * f51ad436 - build/lattice/common: add LatticeiCE40DDROutput <Florent Kermarrec>
    * 22ccf9dd - platforms/nexys_video: add LPC transceivers pins <Florent Kermarrec>
    * 1d9c5588 - build/sim: add jtagremote module (thanks LamdaConcept) <Florent Kermarrec>
    * 57b8bdd5 - soc/integration/soc_core: allow disabling wishbone timeout <Florent Kermarrec>
    * 05dcb5ca - soc/interconnect/wishbone: increase bus error timeout to 1e6 cycles <Florent Kermarrec>
    * 02708d3b - boards/platform/kc705: add sfp pins (both tx and rx) <Florent Kermarrec>
    * 8344a6a4 - soc/cores/clock: add USIDELAYCTRL <Florent Kermarrec>
    * 7e0dd376 - soc/integration/soc_sdram: round port.data_width/l2_size to nearest power of 2 when it's not the case <Florent Kermarrec>
    * 871b958f - boards/targets: improve presentation <Florent Kermarrec>
    * a318343a - boards/platforms/kcu105: add si570_refclk <Florent Kermarrec>
    * 48312890 - boards/platforms/kc705: use vivado as default programmer <Florent Kermarrec>
    * 1b23890e - soc/cores/clock: allow ClockSignal to be used for clkin <Florent Kermarrec>
    * 387ee041 - build/sim/core: fix coverage <Florent Kermarrec>
    * 482abf9b - build/sim/core: set -Wno-BLKANDNBLK (prevent blocking/non-blocking assigns on a same structure in system verilog) <Florent Kermarrec>
    * 9c5f6547 - build/sim/core: set unroll-count to 256 to prevent Error-BLKLOOPINIT <Florent Kermarrec>
    * f132012d - build/sim: disable Warning-WIDTH <Florent Kermarrec>
    * 7c67bac7 - soc/cores/cpu/vexriscv: set default variant to None in add_sources <Florent Kermarrec>
    * 648015d7 - soc/cores/cpu/vexriscv: move verilog variant selection to add_sources <Florent Kermarrec>
    * 2b5a6f10 - targets/kcu105: use USMMCM <Florent Kermarrec>
    * 86e19e62 - targets: pass speedgrade to S7PLL/S7MMCM <Florent Kermarrec>
    * 2581a003 - soc/cores/clock: add Xilinx Ultrascale PLL/MMCM <Florent Kermarrec>
    * 68e1dfca - boards: avoid duplicating platforms that can be found in migen/litex-buildenv <Florent Kermarrec>
    * 041bf412 - soc/integration/cpu_interface: generate name for Memories in get_csr_header <Florent Kermarrec>
    * 9f5d0cef - utils/litex_server: allow specify uart_baudrate as float <Florent Kermarrec>
    * 2c43f6f7 - targets/ulx3s: use pll for phase shift, enable refresh, memtest ok <Florent Kermarrec>
    * 5ef4d09c - targets/versa_ecp5: use pll for phase shift, enable refresh, memtest ok <Florent Kermarrec>
    * 9c801fbe - soc/cores/clock/ECP5PLL: add basic phase support <Florent Kermarrec>
    * a7b5b9d2 - litex_sim: simplify, change sdram module and enable sdram refresh. <Florent Kermarrec>

 * migen changed from 0.6.dev-229-g5e7c71a to 0.6.dev-241-gafe4405
    * afe4405 - sayma_rtm: add si5324_clkout_fabric and rtm_master_aux_clk <Sebastien Bourdeauducq>
    * 3e6f39a - build/platforms: add upduino_v1 board initial support <msloniewski>
    * 6902e6f - sayma_amc: remove outdated and inaccurate comment <Sebastien Bourdeauducq>
    * 57c4467 - sayma_amc: add gth_clk200 pins <Sebastien Bourdeauducq>
    * 81ba8ca - Updating Pins of de0nanosoc.py Platform file <AlexanderKnapik>
    * 9da60e3 - sayma_rtm: offer 50T option <Sebastien Bourdeauducq>
    * fd23e4f - sayma_rtm: fix si5324_clkin IOSTANDARD <Sebastien Bourdeauducq>
    * ee0a827 - sayma_rtm: add DRTIO satellite signals <Sebastien Bourdeauducq>
    * 8bfbdcb - sayma_rtm: cleanup resource numbers <Sebastien Bourdeauducq>
    * 3d919dd - sayma_amc: add master SATA connector pins <Sebastien Bourdeauducq>
    * 27e65bf - test: use environment variables to determine FPGA toolchain presence <William D. Jones>
    * 5ab577e - Minor bugfix in docstring, missing comma at end of line. <Christian Vogel>

Full submodule status
--
 6def7bc83dfb0338632e06a8b14c93faa6af8879 edid-decode (heads/master)
 a628956da7dc794e6e3c95b31ff9ce3af58bc763 flash_proxies (heads/master)
 d89b17177ae675a493ae100de66f64a759f4b82c litedram (remotes/origin/HEAD)
 77fa4bfb1e452adb1fa34c1b0baede68c056763d liteeth (remotes/origin/HEAD)
 3804c4947adedc6c720e3041e518627b0bf57f78 litepcie (remotes/origin/HEAD)
 b78a73110c0c26cf21bf1410329bf1e78286e929 litesata (heads/master)
 c1d8bdf6f23b1070b8bd2dd277a4708863474148 litescope (remotes/origin/HEAD)
 0a9110f901182a1233cc4e64b6e39175f6784621 liteusb (heads/master)
 98e145fba8c25394e9958bad67e2a457d145127e litevideo (remotes/origin/HEAD)
 af52842fbb250d795d110d79fd2ac91442ad98b9 litex (v0.1-710-gaf52842f)
 afe4405becdbc76539f0195c319367187012b05e migen (0.6.dev-241-gafe4405)
mateusz-holenko added a commit to antmicro/litex-buildenv that referenced this issue Aug 4, 2020
 * litedram changed from f51052f to 47a0d5f
    * 47a0d5f - litedram_gen/LiteDRAMUSDDRPHYCRG: remove AsyncResetSynchronizer on sys/sys4x (reset handled by USIDELAYCTRL). <Florent Kermarrec>
    *   02e67ec - Merge pull request timvideos#192 from antmicro/jboc/port-adaptation <enjoy-digital>
    |\
    | * 22bd01c - frontend/wishbone: simplify by reusing LiteDRAMNativePortConverter <Jędrzej Boczar>
    | * b0bde29 - frontend/wishbone: fix wb2native missing wdata.ready when wb/port data widths differ <Jędrzej Boczar>
    | * 79314f9 - frontend/wishbone: fix wdata.valid being high with old data, use cmd.last=1 <Jędrzej Boczar>
    | * 000a352 - frontend/adaptation: delay sending write commands to prevent data loss during up-conversion <Jędrzej Boczar>
    | * 84fb7d3 - frontend/adaptation: refactor up-converter logic to use FSM for clarity <Jędrzej Boczar>
    | * efe9a44 - frontend/adaptation: clean up LiteDRAMNativePortUpConverter code <Jędrzej Boczar>
    | * 2f35e97 - frontend/adaptation: fix error when read follows write to the same address <Jędrzej Boczar>
    | * 1587ee3 - frontend/adaptation: use port.cmd.last instead of port.flush in up-converter <Jędrzej Boczar>
    | * 35fa91c - test/crossbar: up-conversion with mode="both" should be working now <Jędrzej Boczar>
    | * 9b90a56 - frontend/adaptation: combine read/write port up-converters and extend tests <Jędrzej Boczar>
    | * 762cd6d - test/adaptation: add port converter tests with mode="both" <Jędrzej Boczar>
    | * 7a0f7a7 - test/common: fix error in test data <Jędrzej Boczar>
    | * 1cc9656 - test/crossbar: improve NativePortDriver to use separate generatos on data paths <Jędrzej Boczar>
    | * 025e280 - test/crossbar: fix test that was not being run <Jędrzej Boczar>
    *   71b991e - Merge pull request timvideos#210 from oskirby/ddr3-tdqs-mode <enjoy-digital>
    |\
    | * 805a374 - Add support for TDQS mode. <Owen Kirby>
    |/
    * c01e868 - phy/gensdrphy/HalfRateGENSDRPHY: review/simplify and reduce read_latency by 1. <Florent Kermarrec>

 * litescope changed from 15179cb to a80c964
    * a80c964 - Merge pull request timvideos#22 from antmicro/jboc/test-script <enjoy-digital>
    * 8b0274d - examples: add a more general script for testing <Jędrzej Boczar>

 * litex changed from 7bf191ca to abc49964
    * abc49964 - tools/litex_json2dts: add missing copyrights. <Florent Kermarrec>
    * aed0dcee - setup: add litex_json2dts to console_scripts. <Florent Kermarrec>
    *   b64209b3 - Merge pull request timvideos#620 from antmicro/add_litex_json2dts <enjoy-digital>
    |\
    | * fafa844a - json2dts: Add Linux DT generation script <Mateusz Holenko>
    * 0ca99b79 - build/sim/config: add default_clk/default_clk_freq parameters for retro-compatibility with previous API. <Florent Kermarrec>
    * 696ea468 - build/sim: use json_object_get_int64 instead of json_object_get_uint64. <Florent Kermarrec>
    * 382c1a3a - Merge pull request timvideos#619 from antmicro/jboc/sim-clocker <enjoy-digital>
    * f778ff09 - build/sim: improve timebase calculation (strict checks) and update modules <Jędrzej Boczar>
    * c1ae7e59 - build/sim: allow for arbitrary clocks generation using clockers <Jędrzej Boczar>
    * 38054874 - build/sim: use a real timebase in the simulation <Jędrzej Boczar>

 * litex-boards changed from 2ce24df to ee28d7b
    * ee28d7b - targets/ulx3s/add_oled: simplify. <Florent Kermarrec>
    *   623faa9 - Merge pull request timvideos#96 from pepijndevos/oled <enjoy-digital>
    |\
    | * eba7037 - add optional OLED peripheral to ULX3S target <Pepijn de Vos>
    |/
    * 929e55d - platforms/trellisboard: add SDCard PMOD pins. <Florent Kermarrec>
    * 5fd3e8d - ecpix5: add SDCard. <Florent Kermarrec>
    * f058181 - README: fix typo. <Florent Kermarrec>
    * 94ccf1d - targets/trellisboard: simplify clocking when no DDR3, remove firmware_ram (was here for debug). <Florent Kermarrec>
    * ecdc1ef - README: add missings . <Florent Kermarrec>
    * 361afa7 - README: add links to LiteX's wiki. <Florent Kermarrec>
    * 02c0c0a - README: add board picture and fix a few typos. <Florent Kermarrec>
    * eb8a484 - targets/de10nano: fix typo. <Florent Kermarrec>
    * 2cef54a - targets/colorlight_5a_75x: avoid sys_clk_freq of 125MHz with etherbone (no longer required). <Florent Kermarrec>
    * bfbee48 - Readme/boards: fill most of the missing infos. <Florent Kermarrec>
    * bb65692 - add LICENSE. <Florent Kermarrec>
    * e9706d4 - README: add initial contents and list of supported boards. <Florent Kermarrec>
    * 760b8ff - arty: improve xy_pmod_io genericity (allow selecting the PMOD) and enable SDCard. <Florent Kermarrec>
    * 04fc98f - de0nano/ulx3s: add sdram HalfRate support (untested). <Florent Kermarrec>
    * d0ca1be - targets/de10nano/minispartan6: simplify HalfRate support, rename argument to sdram_rate. <Florent Kermarrec>
    * 9730c6f - platforms/de10nano: use additional sdram constraints required for HalfRate. <Florent Kermarrec>
    * 7399d13 - paltforms/de10nano/sdram: enable fast input/output on dq. <Florent Kermarrec>
    * b4b1ab8 - paltforms/de10nano: simplify IO constraints (for consistency with others platforms). <Florent Kermarrec>
    *   89c5bf4 - Merge pull request timvideos#92 from rob-ng15/master <enjoy-digital>
    |\
    | * 7cda143 - Allow use of HalfRateGENSDRPHY <rob-ng15>
    | * cf98393 - Add Misc <rob-ng15>
    * | 1e1589a - zybo_z7: demonstrate use of PS7 (with --cpu-type=zynq7000). <Florent Kermarrec>
    * | 8a3b453 - add Zybo Z7 minimal platform/targets: no PS7 support and USB-UART PMOD on JB. <Florent Kermarrec>
    |/
    * e723bef - platforms/arty: add usb_uart_pmod_io (USB-UART PMOD on JA) to ease debug with a second UART (for UARTbone/LiteScope). <Florent Kermarrec>
    * 19d0b95 - platforms/targets: keep in sync with litex. <Florent Kermarrec>
    * 0ee4b21 - trellisboard/ulx3s: fix sdcard slewrate. <Florent Kermarrec>
    * 7efa1c3 - platforms/arty: add missing pullups on sdcard. <Florent Kermarrec>

 * litex-devicetree changed from 4216376 to 81d837b

Full submodule status
--
 2942d0652a89646c5225bee15dd55cc3b0871766 VexRiscv (1.0.1-417-g2942d06)
 3a6108a75be356a3dc53760d22782f1323248b6b edid-decode (heads/master)
 3a06aa84b62ad24467fb0d2c6ceddf565e9ea447 flash_proxies (heads/master)
 47a0d5fb9e552baa880afab57903a5966d1ee8a7 litedram (2020.04-88-g47a0d5f)
 792013a1756ea50608726ee86989ec38cfc35a8b liteeth (2020.04-21-g792013a)
 6fdd02058fba29008c90b162e0ef707dce15ebeb liteiclink (2020.04)
 0b6a4bb6e742fd4de38d7ca3674f91acc5985b35 litepcie (2020.04-56-g0b6a4bb)
 b36d3a33fbbfcffdb77a7a9e05bc8121387858d3 litesata (2020.04-1-gb36d3a3)
 a80c9640757b61533f300f29628aec3b7316aca8 litescope (2020.04-4-ga80c964)
 7457a29b1a47fe15e81fa37f3bbdd510788f1d53 liteusb (heads/master)
 41f30143075ece3fff5c33a332ed067d1837cbb3 litevideo (2020.04)
 abc49964ea6719866684b474e10167950b85854e litex (2020.04-574-gabc49964)
 ee28d7b5ec1e0bcbeacc342c82cf539a135fbeb3 litex-boards (2020.04-162-gee28d7b)
 81d837bc6897d083a6e1166269c186cd196e5cc7 litex-devicetree (heads/master)
 f1792587a9b50732578e0166cb5d1d83b126cfa6 litex-renode (remotes/origin/HEAD)
 7bc4eb1387b39159a74c1dbd1b820728e0bfbbaa migen (0.6.dev-354-g7bc4eb1)
 8f5a253b22cd4ebcd56304a3662f4c70e3b34ed5 nmigen (v0.1-69-g8f5a253)
 48333804e40c7c9c1c8d5b2e70ba75f4b646d8f0 pythondata-cpu-lm32 (2020.04-5-g4833380)
 4731142284cf87e89b21fb35ceff1139f2f89227 pythondata-cpu-minerva (heads/master)
 af561171f5fc8c684537897f12ef0f429e38624b pythondata-cpu-mor1kx (2020.04-5-gaf56117)
 88974894c800ee2e827db47865e0611a07ff40d7 pythondata-cpu-picorv32 (2020.04-5-g8897489)
 654057b2f5cec0f9fc99487dff67861f76fcbe7e pythondata-cpu-vexriscv (2020.04-7-g654057b)
 7cfcaed2e726027fd622650b58dd77e47c495ee0 pythondata-software-compiler_rt (2020.04-5-g7cfcaed2)
mateusz-holenko added a commit to antmicro/litex-buildenv that referenced this issue Aug 5, 2020
 * litedram changed from f51052f to 47a0d5f
    * 47a0d5f - litedram_gen/LiteDRAMUSDDRPHYCRG: remove AsyncResetSynchronizer on sys/sys4x (reset handled by USIDELAYCTRL). <Florent Kermarrec>
    *   02e67ec - Merge pull request timvideos#192 from antmicro/jboc/port-adaptation <enjoy-digital>
    |\
    | * 22bd01c - frontend/wishbone: simplify by reusing LiteDRAMNativePortConverter <Jędrzej Boczar>
    | * b0bde29 - frontend/wishbone: fix wb2native missing wdata.ready when wb/port data widths differ <Jędrzej Boczar>
    | * 79314f9 - frontend/wishbone: fix wdata.valid being high with old data, use cmd.last=1 <Jędrzej Boczar>
    | * 000a352 - frontend/adaptation: delay sending write commands to prevent data loss during up-conversion <Jędrzej Boczar>
    | * 84fb7d3 - frontend/adaptation: refactor up-converter logic to use FSM for clarity <Jędrzej Boczar>
    | * efe9a44 - frontend/adaptation: clean up LiteDRAMNativePortUpConverter code <Jędrzej Boczar>
    | * 2f35e97 - frontend/adaptation: fix error when read follows write to the same address <Jędrzej Boczar>
    | * 1587ee3 - frontend/adaptation: use port.cmd.last instead of port.flush in up-converter <Jędrzej Boczar>
    | * 35fa91c - test/crossbar: up-conversion with mode="both" should be working now <Jędrzej Boczar>
    | * 9b90a56 - frontend/adaptation: combine read/write port up-converters and extend tests <Jędrzej Boczar>
    | * 762cd6d - test/adaptation: add port converter tests with mode="both" <Jędrzej Boczar>
    | * 7a0f7a7 - test/common: fix error in test data <Jędrzej Boczar>
    | * 1cc9656 - test/crossbar: improve NativePortDriver to use separate generatos on data paths <Jędrzej Boczar>
    | * 025e280 - test/crossbar: fix test that was not being run <Jędrzej Boczar>
    *   71b991e - Merge pull request timvideos#210 from oskirby/ddr3-tdqs-mode <enjoy-digital>
    |\
    | * 805a374 - Add support for TDQS mode. <Owen Kirby>
    |/
    * c01e868 - phy/gensdrphy/HalfRateGENSDRPHY: review/simplify and reduce read_latency by 1. <Florent Kermarrec>

 * litepcie changed from 0b6a4bb to 30456fc
    * 30456fc - litepcie_gen: add csr_ordering support. <Florent Kermarrec>

 * litescope changed from 15179cb to a80c964
    * a80c964 - Merge pull request timvideos#22 from antmicro/jboc/test-script <enjoy-digital>
    * 8b0274d - examples: add a more general script for testing <Jędrzej Boczar>

 * litex changed from 9fc488bd to 00629c45
    * 00629c45 - interconnect/csr: add CSR registers ordering support. <Florent Kermarrec>
    * ee7a7f46 - soc/interconnect/csr: improve ident. <Florent Kermarrec>
    * b1008b01 - integration/soc: add expection on decoder when full address space is mapped. <Florent Kermarrec>
    * b831dc8c - wishbone: revert default adr_width to 30. <Florent Kermarrec>
    * abc49964 - tools/litex_json2dts: add missing copyrights. <Florent Kermarrec>
    * aed0dcee - setup: add litex_json2dts to console_scripts. <Florent Kermarrec>
    *   b64209b3 - Merge pull request timvideos#620 from antmicro/add_litex_json2dts <enjoy-digital>
    |\
    | * fafa844a - json2dts: Add Linux DT generation script <Mateusz Holenko>
    * | 0ca99b79 - build/sim/config: add default_clk/default_clk_freq parameters for retro-compatibility with previous API. <Florent Kermarrec>
    * | 696ea468 - build/sim: use json_object_get_int64 instead of json_object_get_uint64. <Florent Kermarrec>
    * |   382c1a3a - Merge pull request timvideos#619 from antmicro/jboc/sim-clocker <enjoy-digital>
    |\ \
    | |/
    |/|
    | * f778ff09 - build/sim: improve timebase calculation (strict checks) and update modules <Jędrzej Boczar>
    | * c1ae7e59 - build/sim: allow for arbitrary clocks generation using clockers <Jędrzej Boczar>
    | * 38054874 - build/sim: use a real timebase in the simulation <Jędrzej Boczar>
    * | e0f131a3 - cores/uart: add txempty/rxfull CSRs. <Florent Kermarrec>
    * | 2a3e39b1 - tools/litex_server: enable read_merger with CommUDP. <Florent Kermarrec>
    * | a5d0a340 - test: specify wishbone adr_width on AXI(Lite)<-->Wishbone tests and remove debug traces. <Florent Kermarrec>
    * |   eb3374d0 - Merge pull request timvideos#617 from gsomlo/gls_rocket_dma <enjoy-digital>
    |\ \
    | * | 561331ed - debug: make CI print offending values <Gabriel Somlo>
    | * | df3428be - liblitesdcard/sdcard: (temporarily) slow down SDCARD_CLK_FREQ to 25MHz <Gabriel Somlo>
    | * | 2d9dc8f9 - cores/cpu/rocket: expose slave port for DMA <Gabriel Somlo>
    | * | d8161e5a - integration/soc: make DMA slave region cover (at least) the lower 4GB <Gabriel Somlo>
    | * | 70eae5cb - interconnect/wishbone: increase WB address width to 31 <Gabriel Somlo>
    | * | b8c9da81 - soc/interconnect/axi: add Wishbone2AXI converter <Gabriel Somlo>
    |/ /
    * | 2ec4604c - cores/gpio: add support for Record on GPIOOut, GPIOIn and GPIOInOut. <Florent Kermarrec>
    * |   5e53e5d7 - Merge pull request timvideos#615 from pepijndevos/openfpgaloader <enjoy-digital>
    |\ \
    | * | 79ca4d96 - remove debugging <Pepijn de Vos>
    | * | f6e20700 - add openFPGAloader programmer <Pepijn de Vos>
    * | | eab0726c - cpu/vexriscv/core: use variant name as human_name. <Florent Kermarrec>
    * | | e0a763e5 - cpu/vexriscv/system.h: provide empty flush_cpu_i/dcache functions for variants with no i/d cache. <Florent Kermarrec>
    * | | 3ff1bcaf - cpu/zynq7000: set csr map to 0x00000000. <Florent Kermarrec>
    * | |   c0253e3f - Merge pull request timvideos#611 from antmicro/jboc/axi-lite <enjoy-digital>
    |\ \ \
    | | |/
    | |/|
    | * | e78d950a - soc/interconnect/axi: add AXILite -> AXI converter <Jędrzej Boczar>
    * | | cc844054 - tools/litex_server/read_merger: review/simplify a bit. <Florent Kermarrec>
    * | |   4f382ccf - Merge pull request timvideos#605 from cklarhorst/feature-uart-read-merger <enjoy-digital>
    |\ \ \
    | * | | 2034c563 - Merge sequential reads for the UART litex_server backend <Christian Klarhorst>
    * | | | a942e358 - cpu/blackparrot: minor cleanups, add sim variant (since use different flist). <Florent Kermarrec>
    * | | |   86e910df - Merge pull request timvideos#610 from Dolu1990/vexriscv_smp <enjoy-digital>
    |\ \ \ \
    | * | | | 023ab15e - soc/cores/cpu/vexriscv_smp enable dynamic litedram datawidth <Dolu1990>
    | * | | |   e5cd5d54 - Merge branch 'master' into vexriscv_smp <Dolu1990>
    | |\ \ \ \
    | |/ / / /
    |/| | | |
    * | | | | 1938ce36 - integration/soc/add_sdram: allow the CPU to add the direct memory buses when adding the sdram. <Florent Kermarrec>
    * | | | | 6576416b - cores/cpu/rocket: add use_memory_bus parameter to easily disable direct memory bus for testing. <Florent Kermarrec>
    | * | | |   789a70e7 - Merge branch 'master' into vexriscv_smp <Dolu1990>
    | |\ \ \ \
    | |/ / / /
    |/| | | |
    * | | | | 0696b409 - CHANGES: update. <Florent Kermarrec>
    * | | | | fe38e12b - cpu/vexriscv_smp: move litedram import, remove os.path import. <Florent Kermarrec>
    * | | | | 59b95fad - litex_setup: fix vexriscv-smp repository. <Florent Kermarrec>
    * | | | |   9d052f38 - Merge pull request timvideos#607 from Dolu1990/vexriscv_smp <enjoy-digital>
    |\ \ \ \ \
    | | * | | | d284dfbe - soc/cores/cpu/vexriscv_smp config update <Dolu1990>
    | |/ / / /
    | * / / / aa57c7a2 - soc/cores/cpu/vexriscv_smp integration <Dolu1990>
    |/ / / /
    * | | | f87513ab - liblitesdcard/sdcard: increase SDCARD_CLK_FREQ to 50MHz. <Florent Kermarrec>
    * | | | 9518ccf4 - integration/soc/etherbone: expose ethcore (useful to combine udp/etherbone). <Florent Kermarrec>
    | |_|/
    |/| |
    * | | 9e07623b - integration/soc: fix dma_bus typo. <Florent Kermarrec>
    |/ /
    * / 1fdffdfd - targets: keep in sync with litex-boards. <Florent Kermarrec>
    |/
    *   8a0684b1 - Merge pull request timvideos#604 from antmicro/jboc/axi-lite <enjoy-digital>
    |\
    | * 879e6ffe - soc/interconnect/axi: add basic AXI Lite up-converter <Jędrzej Boczar>
    | * 32160e61 - soc/interconnect/axi: separate AXI Lite converter channels <Jędrzej Boczar>
    * |   ed721198 - Merge pull request timvideos#603 from enjoy-digital/socdoc-extensions <Sean Cross>
    |\ \
    | * | 29b2baf9 - doc: socdoc: document new `sphinx_extra_config` parameter <Sean Cross>
    | * | dd366467 - litex: add `sphinx_extra_config` to `generate_docs()` <Sean Cross>
    * | | 3d16838d - Merge pull request timvideos#602 from enjoy-digital/socdoc-extensions <enjoy-digital>
    |\| |
    | * | 7fecfbf8 - doc: socdoc: document `sphinx_extensions` parameter <Sean Cross>
    |/ /
    * | 83370399 - CHANGES: update. <Florent Kermarrec>
    * | 041c7527 - core/cpu: integrate Zynq as a classical CPU (Zynq7000), deprecate SoCZynq. <Florent Kermarrec>
    |/
    * 8bdf6941 - liblitesdcard/sdcard: use max divider of 256 (128 was not enough for the initial 400Khz clock frequency). <Florent Kermarrec>
    * 8f92034d - CHANGES: update. <Florent Kermarrec>
    *   99e88dfc - Merge pull request timvideos#600 from antmicro/jboc/axi-lite <enjoy-digital>
    |\
    | * a9d8b813 - test/axi: move all AXI Lite tests to separate file <Jędrzej Boczar>
    | * 367eb122 - soc/integration: use AXILiteSRAM when using bus_standard="axi-lite" <Jędrzej Boczar>
    | * 8ae501c3 - test/axi: add crossbar stress tests <Jędrzej Boczar>
    | * 706bc25d - soc/integration: add bus standard parser arguments <Jędrzej Boczar>
    | * 32d9e212 - soc/interconnect/axi: improve Timeout module and test it with shared interconnect <Jędrzej Boczar>
    | * 2cab7fbf - test/axi: add shared AXI Lite interconnect tests <Jędrzej Boczar>
    | * 3a08b21d - soc/interconnect/axi: implement AXI Lite decoder <Jędrzej Boczar>
    | * 214cfdca - soc/interconnect/axi: lock AXILiteArbiter until all requests have been responded to <Jędrzej Boczar>
    | * baf23c9c - test/test_axi: add AXI Lite interconnect arbiter tests <Jędrzej Boczar>
    | * a8a583d6 - socinterconnect/axi: interconnect shared sketch <Jędrzej Boczar>
    | * f47ccdae - soc/interconnect/axi: point-to-point interconnect and timeout module with tests <Jędrzej Boczar>
    | * b4c1120e - soc/integration: choose interconnect based on bus standard <Jędrzej Boczar>
    | * 69d8dd78 - soc/integration: add axi-lite standard to SoCBusHandler <Jędrzej Boczar>
    * | d38048ba - soc: add initial DMA bus support (optionally provided by CPU(s) for cache coherency). <Florent Kermarrec>
    |/
    *   2361abb1 - Merge pull request timvideos#599 from antmicro/gen-mmcm-pr <enjoy-digital>
    |\
    | * 66c5f371 - litex-gen: add mmcm core <Piotr Binkowski>
    * 6b72f52c - boards: keep in sync with litex-boards. <Florent Kermarrec>
    * 1f27b740 - soc/integration/add_sdcard: add direct connection to VexRiscv's dmabus for testing. <Florent Kermarrec>
    * 408d1a9f - cpu/vexriscv/system.h: update flush_cpu_dcache. <Florent Kermarrec>
    * 47ce15b4 - interconnect/wishbone: add minimal UpConverter. <Florent Kermarrec>

 * litex-boards changed from 2ce24df to ee28d7b
    * ee28d7b - targets/ulx3s/add_oled: simplify. <Florent Kermarrec>
    *   623faa9 - Merge pull request timvideos#96 from pepijndevos/oled <enjoy-digital>
    |\
    | * eba7037 - add optional OLED peripheral to ULX3S target <Pepijn de Vos>
    |/
    * 929e55d - platforms/trellisboard: add SDCard PMOD pins. <Florent Kermarrec>
    * 5fd3e8d - ecpix5: add SDCard. <Florent Kermarrec>
    * f058181 - README: fix typo. <Florent Kermarrec>
    * 94ccf1d - targets/trellisboard: simplify clocking when no DDR3, remove firmware_ram (was here for debug). <Florent Kermarrec>
    * ecdc1ef - README: add missings . <Florent Kermarrec>
    * 361afa7 - README: add links to LiteX's wiki. <Florent Kermarrec>
    * 02c0c0a - README: add board picture and fix a few typos. <Florent Kermarrec>
    * eb8a484 - targets/de10nano: fix typo. <Florent Kermarrec>
    * 2cef54a - targets/colorlight_5a_75x: avoid sys_clk_freq of 125MHz with etherbone (no longer required). <Florent Kermarrec>
    * bfbee48 - Readme/boards: fill most of the missing infos. <Florent Kermarrec>
    * bb65692 - add LICENSE. <Florent Kermarrec>
    * e9706d4 - README: add initial contents and list of supported boards. <Florent Kermarrec>
    * 760b8ff - arty: improve xy_pmod_io genericity (allow selecting the PMOD) and enable SDCard. <Florent Kermarrec>
    * 04fc98f - de0nano/ulx3s: add sdram HalfRate support (untested). <Florent Kermarrec>
    * d0ca1be - targets/de10nano/minispartan6: simplify HalfRate support, rename argument to sdram_rate. <Florent Kermarrec>
    * 9730c6f - platforms/de10nano: use additional sdram constraints required for HalfRate. <Florent Kermarrec>
    * 7399d13 - paltforms/de10nano/sdram: enable fast input/output on dq. <Florent Kermarrec>
    * b4b1ab8 - paltforms/de10nano: simplify IO constraints (for consistency with others platforms). <Florent Kermarrec>
    *   89c5bf4 - Merge pull request timvideos#92 from rob-ng15/master <enjoy-digital>
    |\
    | * 7cda143 - Allow use of HalfRateGENSDRPHY <rob-ng15>
    | * cf98393 - Add Misc <rob-ng15>
    * | 1e1589a - zybo_z7: demonstrate use of PS7 (with --cpu-type=zynq7000). <Florent Kermarrec>
    * | 8a3b453 - add Zybo Z7 minimal platform/targets: no PS7 support and USB-UART PMOD on JB. <Florent Kermarrec>
    |/
    * e723bef - platforms/arty: add usb_uart_pmod_io (USB-UART PMOD on JA) to ease debug with a second UART (for UARTbone/LiteScope). <Florent Kermarrec>
    * 19d0b95 - platforms/targets: keep in sync with litex. <Florent Kermarrec>
    * 0ee4b21 - trellisboard/ulx3s: fix sdcard slewrate. <Florent Kermarrec>
    * 7efa1c3 - platforms/arty: add missing pullups on sdcard. <Florent Kermarrec>

Full submodule status
--
 2942d0652a89646c5225bee15dd55cc3b0871766 VexRiscv (1.0.1-417-g2942d06)
 3a6108a75be356a3dc53760d22782f1323248b6b edid-decode (heads/master)
 3a06aa84b62ad24467fb0d2c6ceddf565e9ea447 flash_proxies (heads/master)
 47a0d5fb9e552baa880afab57903a5966d1ee8a7 litedram (2020.04-88-g47a0d5f)
 792013a1756ea50608726ee86989ec38cfc35a8b liteeth (2020.04-21-g792013a)
 6fdd02058fba29008c90b162e0ef707dce15ebeb liteiclink (2020.04)
 30456fcb0697ef6c9252b9f2c0b2edf0c45ea353 litepcie (2020.04-57-g30456fc)
 b36d3a33fbbfcffdb77a7a9e05bc8121387858d3 litesata (2020.04-1-gb36d3a3)
 a80c9640757b61533f300f29628aec3b7316aca8 litescope (2020.04-4-ga80c964)
 7457a29b1a47fe15e81fa37f3bbdd510788f1d53 liteusb (heads/master)
 41f30143075ece3fff5c33a332ed067d1837cbb3 litevideo (2020.04)
 00629c45b0ecb44149893439d040d4b4267ba4ea litex (2020.04-578-g00629c45)
 ee28d7b5ec1e0bcbeacc342c82cf539a135fbeb3 litex-boards (2020.04-162-gee28d7b)
 f1792587a9b50732578e0166cb5d1d83b126cfa6 litex-renode (remotes/origin/HEAD)
 7bc4eb1387b39159a74c1dbd1b820728e0bfbbaa migen (0.6.dev-354-g7bc4eb1)
 8f5a253b22cd4ebcd56304a3662f4c70e3b34ed5 nmigen (v0.1-69-g8f5a253)
 48333804e40c7c9c1c8d5b2e70ba75f4b646d8f0 pythondata-cpu-lm32 (2020.04-5-g4833380)
 4731142284cf87e89b21fb35ceff1139f2f89227 pythondata-cpu-minerva (heads/master)
 af561171f5fc8c684537897f12ef0f429e38624b pythondata-cpu-mor1kx (2020.04-5-gaf56117)
 88974894c800ee2e827db47865e0611a07ff40d7 pythondata-cpu-picorv32 (2020.04-5-g8897489)
 654057b2f5cec0f9fc99487dff67861f76fcbe7e pythondata-cpu-vexriscv (2020.04-7-g654057b)
 7cfcaed2e726027fd622650b58dd77e47c495ee0 pythondata-software-compiler_rt (2020.04-5-g7cfcaed2)
mateusz-holenko added a commit to antmicro/litex-buildenv that referenced this issue Aug 25, 2020
 * litedram changed from f51052f to 2020.08-3-g5c69da5
    * 5c69da5 - bench: add initial kcu105 bench target. <Florent Kermarrec>
    * 9995c0f - bench: switch integrated_rom to "rw" mode and reload it over Etherbone at startup. <Florent Kermarrec>
    * ac825e5 - add SPDX License identifier to header and specify file is part of LiteDRAM. <Florent Kermarrec>
    * 198bcba - test/reference: update. <Florent Kermarrec>
    * e3b86fe - getting started: update. <Florent Kermarrec>
    * a0a886e - litedram/init: export xdr ratio and databits. <Florent Kermarrec>
    * 94241d0 - bench: use new platform.request_all on LedChaser. <Florent Kermarrec>
    * 7420597 - bench: add genesys2 bench. <Florent Kermarrec>
    * 37fb44f - add bench directory with a first bench on arty board. <Florent Kermarrec>
    * 4e62d28 - examples/.yml: set cmd_latency to 1 on Kintex7/Ultrascale (values valided in LiteX-Boards). <Florent Kermarrec>
    * 07bf34d - frontend/wishbone: revert non-FSM version, the FSM one does not seem to cover all cases. <Florent Kermarrec>
    * 9c5ce52 - common: add connect method to LiteDRAMNativePort and use it in adapter for identify converter. <Florent Kermarrec>
    * 06f7192 - frontend/adapter/LiteDRAMNativePortConverter: simplify using ratio. <Florent Kermarrec>
    * a3dfc1d - frontend/adapter: minor cleanups. <Florent Kermarrec>
    * deac4c8 - frontend/adapter: simplify LiteDRAMNativePortDownConverter. <Florent Kermarrec>
    * ce4e7f9 - frontend/adapter: simplify LiteDRAMNativePortCDC using stream.ClockDomainCrossing. <Florent Kermarrec>
    * 16fd46b - frontend: rename adaptation to adapter. <Florent Kermarrec>
    * 4970c8a - frontend/wishbone: simplify/review and get FSM back (ease comprehension). <Florent Kermarrec>
    * 47a0d5f - litedram_gen/LiteDRAMUSDDRPHYCRG: remove AsyncResetSynchronizer on sys/sys4x (reset handled by USIDELAYCTRL). <Florent Kermarrec>
    *   02e67ec - Merge pull request timvideos#192 from antmicro/jboc/port-adaptation <enjoy-digital>
    |\
    | * 22bd01c - frontend/wishbone: simplify by reusing LiteDRAMNativePortConverter <Jędrzej Boczar>
    | * b0bde29 - frontend/wishbone: fix wb2native missing wdata.ready when wb/port data widths differ <Jędrzej Boczar>
    | * 79314f9 - frontend/wishbone: fix wdata.valid being high with old data, use cmd.last=1 <Jędrzej Boczar>
    | * 000a352 - frontend/adaptation: delay sending write commands to prevent data loss during up-conversion <Jędrzej Boczar>
    | * 84fb7d3 - frontend/adaptation: refactor up-converter logic to use FSM for clarity <Jędrzej Boczar>
    | * efe9a44 - frontend/adaptation: clean up LiteDRAMNativePortUpConverter code <Jędrzej Boczar>
    | * 2f35e97 - frontend/adaptation: fix error when read follows write to the same address <Jędrzej Boczar>
    | * 1587ee3 - frontend/adaptation: use port.cmd.last instead of port.flush in up-converter <Jędrzej Boczar>
    | * 35fa91c - test/crossbar: up-conversion with mode="both" should be working now <Jędrzej Boczar>
    | * 9b90a56 - frontend/adaptation: combine read/write port up-converters and extend tests <Jędrzej Boczar>
    | * 762cd6d - test/adaptation: add port converter tests with mode="both" <Jędrzej Boczar>
    | * 7a0f7a7 - test/common: fix error in test data <Jędrzej Boczar>
    | * 1cc9656 - test/crossbar: improve NativePortDriver to use separate generatos on data paths <Jędrzej Boczar>
    | * 025e280 - test/crossbar: fix test that was not being run <Jędrzej Boczar>
    *   71b991e - Merge pull request timvideos#210 from oskirby/ddr3-tdqs-mode <enjoy-digital>
    |\
    | * 805a374 - Add support for TDQS mode. <Owen Kirby>
    |/
    * c01e868 - phy/gensdrphy/HalfRateGENSDRPHY: review/simplify and reduce read_latency by 1. <Florent Kermarrec>

 * liteeth changed from 792013a to 54acf9f
    * 54acf9f - phy/pcs_1000basex: keep up to date with MiSoC (adds SGMII and 10/100Mbps support). <Florent Kermarrec>
    * 64b85e6 - add SPDX License identifier to header and specify file is part or LiteEth. <Florent Kermarrec>
    * f275af8 - liteeth_gen: get Wishbone Platform's IOs with Interface.get_ios. <Florent Kermarrec>
    * 0705b35 - Merge pull request timvideos#46 from Xiretza/gen-py-wishbone <enjoy-digital>
    * 6a9a513 - Update gen.py to work with latest LiteX in wishbone mode <Xiretza>

 * liteiclink changed from 6fdd020 to 2020.08-1-gefd200f
    * efd200f - add SPDX License identifier to header and specify file is part of LiteICLink. <Florent Kermarrec>
    * 60b1994 - getting started: update. <Florent Kermarrec>

 * litepcie changed from 0b6a4bb to 2020.08-1-g0718fd1
    * 0718fd1 - add SPDX License identifier to header and specify file is part of LitePCIe. <Florent Kermarrec>
    * 29d4963 - getting started: update. <Florent Kermarrec>
    * 30456fc - litepcie_gen: add csr_ordering support. <Florent Kermarrec>

 * litesata changed from b36d3a3 to 2020.08-1-gba006a7
    * ba006a7 - add SPDX License identifier to header and specify file is part of LiteSATA. <Florent Kermarrec>
    * 2e4591c - getting started: update. <Florent Kermarrec>

 * litescope changed from 15179cb to 2020.08-2-g02b543e
    * 02b543e - litescope_cli: add capture subsampling support. <Florent Kermarrec>
    * 2739d5a - add SPDX License identifier to header and specify file is part of LiteScope. <Florent Kermarrec>
    * ec7bd6b - getting started: update. <Florent Kermarrec>
    *   7d22774 - Merge pull request timvideos#27 from cklarhorst/fix-storage-wrong-clock-domain <enjoy-digital>
    |\
    | * ad4e46c - Fix: 2 signals in the storage class belong to the wrong clock domain <Christian Klarhorst>
    |/
    *   2ad73a0 - Merge pull request timvideos#25 from cklarhorst/fix-trigger-flush-timer-wrong-clock-domain <enjoy-digital>
    |\
    | * 16e6555 - Fix: A WaitTimer belongs to the wrong clock domain (trigger flush) <Christian Klarhorst>
    |/
    * 0066866 - travis: install riscv toolchain for example. <Florent Kermarrec>
    * 6a322ed - test/test_examples: update. <Florent Kermarrec>
    * bc6c5e3 - examples: add mininal example on Arty with Etherbone and ibus/counter on analyzer. <Florent Kermarrec>
    * 0182377 - examples: remove obsolete examples rename litescope_test to litescope_cli and add it as console script. <Florent Kermarrec>
    * a80c964 - Merge pull request timvideos#22 from antmicro/jboc/test-script <enjoy-digital>
    * 8b0274d - examples: add a more general script for testing <Jędrzej Boczar>

 * litex changed from 9fc488bd to 3897acb9
    * 3897acb9 - lattice/nx: update copyrights. <Florent Kermarrec>
    * 4364043b - integration/soc: expose integrated_rom_mode to allow ROM to be writable (useful for BIOS/ROM development where content is reloaded over UARTBone/Etherbone). <Florent Kermarrec>
    * 885c339d - soc/cores: add initial NX-LRAM support. <Piense>
    * cf13833e - cores/clock: add initial NX-OSCA support. <Piense>
    * e441bd60 - build/lattice: add initial Radiant support for NX FPGA family (Crosslink-NX/Certus-NX). <Piense>
    *   8a44464a - Merge pull request timvideos#640 from antmicro/mor1kx_dt <enjoy-digital>
    |\
    | * 4dab1eb0 - litex_json2dts: Add support for mor1kx <Mateusz Holenko>
    * | 4f1c32ab - targets/de0nano: set sys2x_ps to 180° for sdram_rate=1:2. <Florent Kermarrec>
    * | d16051ff - boards/ulx3s: keep up to date with litex-boards. <Florent Kermarrec>
    * | d826c606 - soc/cores/clock/ECP5PLL: specificy CLKOS3_F/CPHASE and -1 on cphase to match Clarity Designer values. <Florent Kermarrec>
    * | 9e37b16e - soc/interconnect/axi/AXILite2CSR: add register parameter for genericity. <Florent Kermarrec>
    |/
    *   42d8fc22 - Merge branch 'master' of https://github.com/enjoy-digital/litex <Florent Kermarrec>
    |\
    | *   ee0e2402 - Merge pull request timvideos#631 from gsomlo/gls-abc9-fixup <enjoy-digital>
    | |\
    | | * c4710b37 - build/lattice/trellis: make "-abc9" an optional argument <Gabriel Somlo>
    * | | 77ae2433 - test: add SPDX License identifier to header and specify file is part of LiteX. <Florent Kermarrec>
    * | | b8371ef4 - tools: add SPDX License identifier to header and specify file is part of LiteX. <Florent Kermarrec>
    * | | 93d906f9 - soc: add SPDX License identifier and specify file is part of LiteX. <Florent Kermarrec>
    * | | e52ffd2d - gen: add specify SPDX License identifier and specify file is part of Migen and has been modified/adapted for LiteX. <Florent Kermarrec>
    * | | 70610b23 - build: add SPDX License identifier and specify file is part of LiteX. <Florent Kermarrec>
    * | | 6ee882d1 - platforms/targets: add SPDX License identifier to header and specify file is part of LiteX. <Florent Kermarrec>
    |/ /
    * | 9950e756 - build/io: fix InferedSDRIO (thanks @mtdudek). <Florent Kermarrec>
    * |   bae871a8 - Merge pull request timvideos#632 from gsomlo/gls-sdcard-refactor <enjoy-digital>
    |\ \
    | * | e0b2b815 - liblitesdcard/sdcard: read sdcard response only when needed <Gabriel Somlo>
    | * | a47b2de5 - sdcard: refactor command functions <Gabriel Somlo>
    | * | bfd6b3c3 - liblitesdcard/sdcard: cosmetic fixes (indentation, #ifdef, etc.) <Gabriel Somlo>
    | * | 37ebcd3b - factor out busy_wait_us() <Gabriel Somlo>
    | |/
    * |   3206dba9 - Merge pull request timvideos#636 from Xiretza/minerva-cli-filetype <enjoy-digital>
    |\ \
    | * | e3bb3a94 - Fix call to generation of minerva output file <Xiretza>
    | |/
    * |   8bc5dd7c - Merge pull request timvideos#635 from Xiretza/collections-abc-deprecation <enjoy-digital>
    |\ \
    | * | fcc7058b - Fix DeprecationWarning for collections.abc <Xiretza>
    | |/
    * |   79844362 - Merge pull request timvideos#634 from betrusted-io/spi_opi_timing_only <enjoy-digital>
    |\ \
    | |/
    |/|
    | * d783e86f - add a pipe register to relax an async_default timing path <bunnie>
    * | 35929c0f - soc/integration/csr_bridge: use registered version only when SDRAM is present. <Florent Kermarrec>
    * | e4f5dd98 - interconnect/wishbone/Wishbone2CSR: add registered version and use it as default. <Florent Kermarrec>
    * | b344196a - build/lattice/diamond: use diamondc instead of pnmainc (avoid having to set environment variables). <Florent Kermarrec>
    * | f730f1d7 - cores/cpu/vexriscv_smp fix argument parsing <Dolu1990>
    * | 0e480dd6 - bios/main/sdram: fix speed reporting (Mbps/pin not MHz). <Florent Kermarrec>
    * |   bb7f3343 - Merge pull request timvideos#627 from gsomlo/gls-dma-addr-64 <enjoy-digital>
    |\ \
    | * | ba34c852 - cores/dma, liblitesdcard/sdcard: use 64 bits for dma base address <Gabriel Somlo>
    |/ /
    * | 4cf28a01 - software/bios: display SDRAM databits and freq. <Florent Kermarrec>
    * | 6f69679d - cpu/vexriscv_smp: more coherent_dma to __init__ instead of add_memory_buses. <Florent Kermarrec>
    * | b3531cd2 - cores/cpu: add external cpu_type. <Florent Kermarrec>
    * | b9d3aab5 - targets: use platform.request_all on LedChaser. <Florent Kermarrec>
    * | 14c91664 - build/generic_platform: add request_all method. <Florent Kermarrec>
    * | 57335b99 - cores/cpu/zynq7000: simplify using new loose parameter of Platform.request. <Florent Kermarrec>
    * |   4867f2b3 - Merge pull request timvideos#624 from trabucayre/emio_zynq <enjoy-digital>
    |\ \
    | * | 87c26a30 - soc/cores/cpu/zynq7000: add enet0, enet0_mdio, sdio, sdio_cd and sdio_wp only when configured in EMIO mode <Gwenhael Goavec-Merou>
    * | | 48d63f23 - build/generic_plaform: add loose parameter to return None when not available/existing. <Florent Kermarrec>
    * | |   81df7b70 - Merge pull request timvideos#625 from scanakci/blackparrot_litex <enjoy-digital>
    |\ \ \
    | * | | 2457859b - update BlackParrot transducer <sadullah>
    | * | | d2dabcef - Blackparrot human name update <sadullah>
    | |/ /
    * / / 188e6f57 - integration/soc/add_etherbone: pass phy to ethcore not self.ethphy. <Florent Kermarrec>
    |/ /
    * |   d5062d1f - Merge pull request timvideos#623 from Dolu1990/vexriscv_smp <enjoy-digital>
    |\ \
    | * | 07a8e696 - cpu/vexriscv_smp Add --with-coherent-dma <Dolu1990>
    |/ /
    * | 9a4c5aa1 - integration/soc/add_sdram: update rules to connect main bus to dram. <Florent Kermarrec>
    * | a1644510 - cpu/vexriscv_smp: fix args_read. <Florent Kermarrec>
    * | 896b68cd - cpu/vexriscv_smp: cleanup, fix coherent_dma connection. <Florent Kermarrec>
    * |   342f359e - Merge pull request timvideos#622 from antmicro/fix_connectors <enjoy-digital>
    |\ \
    | * | de9ea19c - arty: Change USB-uart and I2S Pmod configuration <Pawel Sagan>
    * | | 3b293612 - soc/interconnect/axi: minor cleanups. <Florent Kermarrec>
    * | | 303d6cca - interconnect/stream: set default AsyncFIFO depth to None and add depth parameter to ClockDomainCrossing. <Florent Kermarrec>
    * | | 00629c45 - interconnect/csr: add CSR registers ordering support. <Florent Kermarrec>
    * | | ee7a7f46 - soc/interconnect/csr: improve ident. <Florent Kermarrec>
    * | | b1008b01 - integration/soc: add expection on decoder when full address space is mapped. <Florent Kermarrec>
    * | | b831dc8c - wishbone: revert default adr_width to 30. <Florent Kermarrec>
    | |/
    |/|
    * | abc49964 - tools/litex_json2dts: add missing copyrights. <Florent Kermarrec>
    * | aed0dcee - setup: add litex_json2dts to console_scripts. <Florent Kermarrec>
    * |   b64209b3 - Merge pull request timvideos#620 from antmicro/add_litex_json2dts <enjoy-digital>
    |\ \
    | * | fafa844a - json2dts: Add Linux DT generation script <Mateusz Holenko>
    * | | 0ca99b79 - build/sim/config: add default_clk/default_clk_freq parameters for retro-compatibility with previous API. <Florent Kermarrec>
    * | | 696ea468 - build/sim: use json_object_get_int64 instead of json_object_get_uint64. <Florent Kermarrec>
    * | |   382c1a3a - Merge pull request timvideos#619 from antmicro/jboc/sim-clocker <enjoy-digital>
    |\ \ \
    | |/ /
    |/| |
    | * | f778ff09 - build/sim: improve timebase calculation (strict checks) and update modules <Jędrzej Boczar>
    | * | c1ae7e59 - build/sim: allow for arbitrary clocks generation using clockers <Jędrzej Boczar>
    | * | 38054874 - build/sim: use a real timebase in the simulation <Jędrzej Boczar>
    * | | e0f131a3 - cores/uart: add txempty/rxfull CSRs. <Florent Kermarrec>
    * | | 2a3e39b1 - tools/litex_server: enable read_merger with CommUDP. <Florent Kermarrec>
    * | | a5d0a340 - test: specify wishbone adr_width on AXI(Lite)<-->Wishbone tests and remove debug traces. <Florent Kermarrec>
    * | |   eb3374d0 - Merge pull request timvideos#617 from gsomlo/gls_rocket_dma <enjoy-digital>
    |\ \ \
    | * | | 561331ed - debug: make CI print offending values <Gabriel Somlo>
    | * | | df3428be - liblitesdcard/sdcard: (temporarily) slow down SDCARD_CLK_FREQ to 25MHz <Gabriel Somlo>
    | * | | 2d9dc8f9 - cores/cpu/rocket: expose slave port for DMA <Gabriel Somlo>
    | * | | d8161e5a - integration/soc: make DMA slave region cover (at least) the lower 4GB <Gabriel Somlo>
    | * | | 70eae5cb - interconnect/wishbone: increase WB address width to 31 <Gabriel Somlo>
    | * | | b8c9da81 - soc/interconnect/axi: add Wishbone2AXI converter <Gabriel Somlo>
    |/ / /
    * | | 2ec4604c - cores/gpio: add support for Record on GPIOOut, GPIOIn and GPIOInOut. <Florent Kermarrec>
    * | |   5e53e5d7 - Merge pull request timvideos#615 from pepijndevos/openfpgaloader <enjoy-digital>
    |\ \ \
    | * | | 79ca4d96 - remove debugging <Pepijn de Vos>
    | * | | f6e20700 - add openFPGAloader programmer <Pepijn de Vos>
    * | | | eab0726c - cpu/vexriscv/core: use variant name as human_name. <Florent Kermarrec>
    * | | | e0a763e5 - cpu/vexriscv/system.h: provide empty flush_cpu_i/dcache functions for variants with no i/d cache. <Florent Kermarrec>
    * | | | 3ff1bcaf - cpu/zynq7000: set csr map to 0x00000000. <Florent Kermarrec>
    * | | |   c0253e3f - Merge pull request timvideos#611 from antmicro/jboc/axi-lite <enjoy-digital>
    |\ \ \ \
    | | |/ /
    | |/| |
    | * | | e78d950a - soc/interconnect/axi: add AXILite -> AXI converter <Jędrzej Boczar>
    * | | | cc844054 - tools/litex_server/read_merger: review/simplify a bit. <Florent Kermarrec>
    * | | |   4f382ccf - Merge pull request timvideos#605 from cklarhorst/feature-uart-read-merger <enjoy-digital>
    |\ \ \ \
    | * | | | 2034c563 - Merge sequential reads for the UART litex_server backend <Christian Klarhorst>
    * | | | | a942e358 - cpu/blackparrot: minor cleanups, add sim variant (since use different flist). <Florent Kermarrec>
    | |_|_|/
    |/| | |
    * | | |   86e910df - Merge pull request timvideos#610 from Dolu1990/vexriscv_smp <enjoy-digital>
    |\ \ \ \
    | * | | | 023ab15e - soc/cores/cpu/vexriscv_smp enable dynamic litedram datawidth <Dolu1990>
    | * | | |   e5cd5d54 - Merge branch 'master' into vexriscv_smp <Dolu1990>
    | |\ \ \ \
    | |/ / / /
    |/| | | |
    * | | | | 1938ce36 - integration/soc/add_sdram: allow the CPU to add the direct memory buses when adding the sdram. <Florent Kermarrec>
    * | | | | 6576416b - cores/cpu/rocket: add use_memory_bus parameter to easily disable direct memory bus for testing. <Florent Kermarrec>
    | * | | |   789a70e7 - Merge branch 'master' into vexriscv_smp <Dolu1990>
    | |\ \ \ \
    | |/ / / /
    |/| | | |
    * | | | | 0696b409 - CHANGES: update. <Florent Kermarrec>
    * | | | | fe38e12b - cpu/vexriscv_smp: move litedram import, remove os.path import. <Florent Kermarrec>
    * | | | | 59b95fad - litex_setup: fix vexriscv-smp repository. <Florent Kermarrec>
    * | | | |   9d052f38 - Merge pull request timvideos#607 from Dolu1990/vexriscv_smp <enjoy-digital>
    |\ \ \ \ \
    | | * | | | d284dfbe - soc/cores/cpu/vexriscv_smp config update <Dolu1990>
    | |/ / / /
    | * / / / aa57c7a2 - soc/cores/cpu/vexriscv_smp integration <Dolu1990>
    |/ / / /
    * | | | f87513ab - liblitesdcard/sdcard: increase SDCARD_CLK_FREQ to 50MHz. <Florent Kermarrec>
    * | | | 9518ccf4 - integration/soc/etherbone: expose ethcore (useful to combine udp/etherbone). <Florent Kermarrec>
    | |_|/
    |/| |
    * | | 9e07623b - integration/soc: fix dma_bus typo. <Florent Kermarrec>
    |/ /
    * / 1fdffdfd - targets: keep in sync with litex-boards. <Florent Kermarrec>
    |/
    *   8a0684b1 - Merge pull request timvideos#604 from antmicro/jboc/axi-lite <enjoy-digital>
    |\
    | * 879e6ffe - soc/interconnect/axi: add basic AXI Lite up-converter <Jędrzej Boczar>
    | * 32160e61 - soc/interconnect/axi: separate AXI Lite converter channels <Jędrzej Boczar>
    * |   ed721198 - Merge pull request timvideos#603 from enjoy-digital/socdoc-extensions <Sean Cross>
    |\ \
    | * | 29b2baf9 - doc: socdoc: document new `sphinx_extra_config` parameter <Sean Cross>
    | * | dd366467 - litex: add `sphinx_extra_config` to `generate_docs()` <Sean Cross>
    * | | 3d16838d - Merge pull request timvideos#602 from enjoy-digital/socdoc-extensions <enjoy-digital>
    |\| |
    | * | 7fecfbf8 - doc: socdoc: document `sphinx_extensions` parameter <Sean Cross>
    |/ /
    * | 83370399 - CHANGES: update. <Florent Kermarrec>
    * | 041c7527 - core/cpu: integrate Zynq as a classical CPU (Zynq7000), deprecate SoCZynq. <Florent Kermarrec>
    |/
    * 8bdf6941 - liblitesdcard/sdcard: use max divider of 256 (128 was not enough for the initial 400Khz clock frequency). <Florent Kermarrec>
    * 8f92034d - CHANGES: update. <Florent Kermarrec>
    *   99e88dfc - Merge pull request timvideos#600 from antmicro/jboc/axi-lite <enjoy-digital>
    |\
    | * a9d8b813 - test/axi: move all AXI Lite tests to separate file <Jędrzej Boczar>
    | * 367eb122 - soc/integration: use AXILiteSRAM when using bus_standard="axi-lite" <Jędrzej Boczar>
    | * 8ae501c3 - test/axi: add crossbar stress tests <Jędrzej Boczar>
    | * 706bc25d - soc/integration: add bus standard parser arguments <Jędrzej Boczar>
    | * 32d9e212 - soc/interconnect/axi: improve Timeout module and test it with shared interconnect <Jędrzej Boczar>
    | * 2cab7fbf - test/axi: add shared AXI Lite interconnect tests <Jędrzej Boczar>
    | * 3a08b21d - soc/interconnect/axi: implement AXI Lite decoder <Jędrzej Boczar>
    | * 214cfdca - soc/interconnect/axi: lock AXILiteArbiter until all requests have been responded to <Jędrzej Boczar>
    | * baf23c9c - test/test_axi: add AXI Lite interconnect arbiter tests <Jędrzej Boczar>
    | * a8a583d6 - socinterconnect/axi: interconnect shared sketch <Jędrzej Boczar>
    | * f47ccdae - soc/interconnect/axi: point-to-point interconnect and timeout module with tests <Jędrzej Boczar>
    | * b4c1120e - soc/integration: choose interconnect based on bus standard <Jędrzej Boczar>
    | * 69d8dd78 - soc/integration: add axi-lite standard to SoCBusHandler <Jędrzej Boczar>
    * | d38048ba - soc: add initial DMA bus support (optionally provided by CPU(s) for cache coherency). <Florent Kermarrec>
    |/
    *   2361abb1 - Merge pull request timvideos#599 from antmicro/gen-mmcm-pr <enjoy-digital>
    |\
    | * 66c5f371 - litex-gen: add mmcm core <Piotr Binkowski>
    * 6b72f52c - boards: keep in sync with litex-boards. <Florent Kermarrec>
    * 1f27b740 - soc/integration/add_sdcard: add direct connection to VexRiscv's dmabus for testing. <Florent Kermarrec>
    * 408d1a9f - cpu/vexriscv/system.h: update flush_cpu_dcache. <Florent Kermarrec>
    * 47ce15b4 - interconnect/wishbone: add minimal UpConverter. <Florent Kermarrec>

 * litex-boards changed from 2ce24df to 2020.08-9-g63b65e2
    * 63b65e2 - crosslink_nx_evn: update copyrights. <Florent Kermarrec>
    * 153326f - targets/icebreaker: update flash. <Florent Kermarrec>
    * 795e34a - add initial Crosslink-NX support. <Piense>
    * 84c19a6 - targets/de0nano: set sys2x_ps phase to 180° for sdram_rate=1:2. <Florent Kermarrec>
    * 70594a5 - ulx3s: simplify sdram constraints and increase phase to 180 for sdram_rate=1:2. <Florent Kermarrec>
    * 1781be1 - general: add SPDX License identifier to header and specify files are part of LiteX-Boards. <Florent Kermarrec>
    * 83d8b8d - platforms/acorn_cle_215: integrated sdcard ios as extension. <Florent Kermarrec>
    *   d365836 - Merge pull request timvideos#100 from connorwk/master <enjoy-digital>
    |\
    | * f328909 - Moved platform call inside of BaseSoC init for compatibility with linux-on-litex-vexriscv support. Added optional spi-sdcard support over P2 header. <connorwk>
    |/
    * 45bb329 - targets/colorlight_5a_75x: enable HalfRate SDRAM PHY. <Florent Kermarrec>
    * b6a1ad5 - targets/orangecrab: add simple CRG when built without DDR3. <Florent Kermarrec>
    * 869cead - targets: use platform.request_all on LedChaser. <Florent Kermarrec>
    *   8583c44 - Merge pull request timvideos#98 from antmicro/arty_pmod_configuration <enjoy-digital>
    |\
    | * d2cd6d4 - arty: Change USB-uart and I2S Pmod configuration <Pawel Sagan>
    |/
    * ee28d7b - targets/ulx3s/add_oled: simplify. <Florent Kermarrec>
    *   623faa9 - Merge pull request timvideos#96 from pepijndevos/oled <enjoy-digital>
    |\
    | * eba7037 - add optional OLED peripheral to ULX3S target <Pepijn de Vos>
    |/
    * 929e55d - platforms/trellisboard: add SDCard PMOD pins. <Florent Kermarrec>
    * 5fd3e8d - ecpix5: add SDCard. <Florent Kermarrec>
    * f058181 - README: fix typo. <Florent Kermarrec>
    * 94ccf1d - targets/trellisboard: simplify clocking when no DDR3, remove firmware_ram (was here for debug). <Florent Kermarrec>
    * ecdc1ef - README: add missings . <Florent Kermarrec>
    * 361afa7 - README: add links to LiteX's wiki. <Florent Kermarrec>
    * 02c0c0a - README: add board picture and fix a few typos. <Florent Kermarrec>
    * eb8a484 - targets/de10nano: fix typo. <Florent Kermarrec>
    * 2cef54a - targets/colorlight_5a_75x: avoid sys_clk_freq of 125MHz with etherbone (no longer required). <Florent Kermarrec>
    * bfbee48 - Readme/boards: fill most of the missing infos. <Florent Kermarrec>
    * bb65692 - add LICENSE. <Florent Kermarrec>
    * e9706d4 - README: add initial contents and list of supported boards. <Florent Kermarrec>
    * 760b8ff - arty: improve xy_pmod_io genericity (allow selecting the PMOD) and enable SDCard. <Florent Kermarrec>
    * 04fc98f - de0nano/ulx3s: add sdram HalfRate support (untested). <Florent Kermarrec>
    * d0ca1be - targets/de10nano/minispartan6: simplify HalfRate support, rename argument to sdram_rate. <Florent Kermarrec>
    * 9730c6f - platforms/de10nano: use additional sdram constraints required for HalfRate. <Florent Kermarrec>
    * 7399d13 - paltforms/de10nano/sdram: enable fast input/output on dq. <Florent Kermarrec>
    * b4b1ab8 - paltforms/de10nano: simplify IO constraints (for consistency with others platforms). <Florent Kermarrec>
    *   89c5bf4 - Merge pull request timvideos#92 from rob-ng15/master <enjoy-digital>
    |\
    | * 7cda143 - Allow use of HalfRateGENSDRPHY <rob-ng15>
    | * cf98393 - Add Misc <rob-ng15>
    * | 1e1589a - zybo_z7: demonstrate use of PS7 (with --cpu-type=zynq7000). <Florent Kermarrec>
    * | 8a3b453 - add Zybo Z7 minimal platform/targets: no PS7 support and USB-UART PMOD on JB. <Florent Kermarrec>
    |/
    * e723bef - platforms/arty: add usb_uart_pmod_io (USB-UART PMOD on JA) to ease debug with a second UART (for UARTbone/LiteScope). <Florent Kermarrec>
    * 19d0b95 - platforms/targets: keep in sync with litex. <Florent Kermarrec>
    * 0ee4b21 - trellisboard/ulx3s: fix sdcard slewrate. <Florent Kermarrec>
    * 7efa1c3 - platforms/arty: add missing pullups on sdcard. <Florent Kermarrec>

 * litex-renode changed from f179258 to 3d01f40
    * 3d01f40 - Merge pull request timvideos#29 from antmicro/i2c_generation <Mateusz Hołenko>
    * ed34c42 - generate-renode-scripts: Add I2C support <Mateusz Holenko>
    * a431211 - generate-zephyr-dts: Add I2C support <Mateusz Holenko>
    * 9f4f0fb - [FIX] Fix config generation <Mateusz Holenko>

 * nmigen changed from 8f5a253 to 1ad6e32
    * 1ad6e32 - Clifford -> Claire <Sebastien Bourdeauducq>
    * 40f7f12 - Add option to specify solver in nmigen.test.utils <Donald Sebastian Leung>

Full submodule status
--
 2942d0652a89646c5225bee15dd55cc3b0871766 VexRiscv (1.0.1-417-g2942d06)
 3a6108a75be356a3dc53760d22782f1323248b6b edid-decode (heads/master)
 3a06aa84b62ad24467fb0d2c6ceddf565e9ea447 flash_proxies (heads/master)
 5c69da5d6db245dedab479509c0eaa8c1c80027c litedram (2020.08-3-g5c69da5)
 54acf9fd76c226d7760294ffde86418e52e0951b liteeth (2020.04-26-g54acf9f)
 efd200fa9e625144131a310fc09fd1fecf1682e6 liteiclink (2020.08-1-gefd200f)
 0718fd135fc30e0a3598eaf66ce2fcb54b62193c litepcie (2020.08-1-g0718fd1)
 ba006a78c12e25354dafb021510c043dbe070614 litesata (2020.08-1-gba006a7)
 02b543e5ba24c025212515f6e32f542629d823e8 litescope (2020.08-2-g02b543e)
 7457a29b1a47fe15e81fa37f3bbdd510788f1d53 liteusb (heads/master)
 41f30143075ece3fff5c33a332ed067d1837cbb3 litevideo (2020.04)
 3897acb9e4b91ad58abbcea8e3cff6e44223bd02 litex (2020.04-639-g3897acb9)
 63b65e278c279a9cf8c4da31db8f7e845edba394 litex-boards (2020.08-9-g63b65e2)
 3d01f408539b4641f9d2b42ebd8237436e49d16b litex-renode (remotes/origin/HEAD)
 7bc4eb1387b39159a74c1dbd1b820728e0bfbbaa migen (0.6.dev-354-g7bc4eb1)
 1ad6e3207f02e913407867dddddb8f50fad0ced4 nmigen (v0.1-71-g1ad6e32)
 48333804e40c7c9c1c8d5b2e70ba75f4b646d8f0 pythondata-cpu-lm32 (2020.08)
 4731142284cf87e89b21fb35ceff1139f2f89227 pythondata-cpu-minerva (2020.08)
 af561171f5fc8c684537897f12ef0f429e38624b pythondata-cpu-mor1kx (2020.08)
 88974894c800ee2e827db47865e0611a07ff40d7 pythondata-cpu-picorv32 (2020.08)
 654057b2f5cec0f9fc99487dff67861f76fcbe7e pythondata-cpu-vexriscv (2020.08)
 7cfcaed2e726027fd622650b58dd77e47c495ee0 pythondata-software-compiler_rt (2020.08)
 da4c8c72eeb22894369b3936abb73f828f222b8e valentyusb (v0.3.3-195-gda4c8c7)
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