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wazeroir: backfill vector instruction unittets #623

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merged 5 commits into from
Jun 6, 2022
+835 −8
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wazeroir: backfill vector instruction unittets #623

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wazeroir: backfill vector instruction unittets
mathetake Jun 6, 2022
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done
mathetake Jun 6, 2022
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format
mathetake Jun 6, 2022
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mathetake Jun 6, 2022
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mathetake Jun 6, 2022
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14 changes: 6 additions & 8 deletions internal/wasm/func_validation_test.go
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Original file line number Diff line number Diff line change
Expand Up @@ -2709,8 +2709,7 @@ func TestModule_funcValidation_SIMD(t *testing.T) {
vi2v := func(vec OpcodeVec) (ret []byte) {
ret = addV128Const(ret)
return append(ret,
OpcodeI32Const,
1, 1, 1, 1,
OpcodeI32Const, 1,
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needs leb128 encoding but yeah somehow this worked since before but fixed it 😄

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ah cool

OpcodeVecPrefix,
vec,
OpcodeDrop,
Expand All @@ -2720,8 +2719,7 @@ func TestModule_funcValidation_SIMD(t *testing.T) {

load := func(vec OpcodeVec, offset, align uint32) (ret []byte) {
ret = []byte{
OpcodeI32Const,
1, 1, 1, 1,
OpcodeI32Const, 1,
OpcodeVecPrefix,
vec,
}
Expand All @@ -2736,7 +2734,7 @@ func TestModule_funcValidation_SIMD(t *testing.T) {
}

loadLane := func(vec OpcodeVec, offset, align uint32, lane byte) (ret []byte) {
ret = addV128Const([]byte{OpcodeI32Const, 1, 1, 1, 1})
ret = addV128Const([]byte{OpcodeI32Const, 1})
ret = append(ret,
OpcodeVecPrefix,
vec,
Expand All @@ -2753,7 +2751,7 @@ func TestModule_funcValidation_SIMD(t *testing.T) {
}

storeLane := func(vec OpcodeVec, offset, align uint32, lane byte) (ret []byte) {
ret = addV128Const([]byte{OpcodeI32Const, 1, 1, 1, 1})
ret = addV128Const([]byte{OpcodeI32Const, 1})
ret = append(ret,
OpcodeVecPrefix,
vec,
Expand Down Expand Up @@ -2784,9 +2782,9 @@ func TestModule_funcValidation_SIMD(t *testing.T) {

switch vec {
case OpcodeVecI8x16ReplaceLane, OpcodeVecI16x8ReplaceLane, OpcodeVecI32x4ReplaceLane:
ret = append(ret, OpcodeI32Const, 0, 0, 0, 0)
ret = append(ret, OpcodeI32Const, 0)
case OpcodeVecI64x2ReplaceLane:
ret = append(ret, OpcodeI64Const, 0, 0, 0, 0, 0, 0, 0, 0)
ret = append(ret, OpcodeI64Const, 0)
case OpcodeVecF32x4ReplaceLane:
ret = append(ret, OpcodeF32Const, 0, 0, 0, 0)
case OpcodeVecF64x2ReplaceLane:
Expand Down
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