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[gfx] Revert "Update Device API: Splitting ResourceBinder into sepera… #7019

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Revert "[gfx] Update Device API: Splitting ResourceBinder into sepera…
…te ShaderResourceSet & RasterResources (#6954)"

This reverts commit 4223bf3.
feisuzhu committed Dec 31, 2022
commit 854dc4dd38ebaf46f9180b0c93f30fbc69855e80
2 changes: 1 addition & 1 deletion .github/workflows/scripts/aot-demo.sh
Original file line number Diff line number Diff line change
@@ -4,7 +4,7 @@ set -ex
export TI_SKIP_VERSION_CHECK=ON
export TI_CI=1

export TAICHI_AOT_DEMO_URL=https://github.com/bobcao3/taichi-aot-demo
export TAICHI_AOT_DEMO_URL=https://github.com/taichi-dev/taichi-aot-demo
export TAICHI_AOT_DEMO_BRANCH=master

export TAICHI_UNITY2_URL=https://github.com/taichi-dev/taichi-unity2
16 changes: 6 additions & 10 deletions cpp_examples/rhi_examples/sample_2_triangle.cpp
Original file line number Diff line number Diff line change
@@ -73,12 +73,6 @@ class SampleApp : public App {
device->unmap(*vertex_buffer);
}

// Define the raster state
{
raster_resources = device->create_raster_resources_unique();
raster_resources->vertex_buffer(vertex_buffer->get_ptr(0), 0);
}

TI_INFO("App Init Done");
}

@@ -100,7 +94,10 @@ class SampleApp : public App {

// Bind our triangle pipeline
cmdlist->bind_pipeline(pipeline.get());
cmdlist->bind_raster_resources(raster_resources.get());
// Get the binder and bind our vertex buffer
auto resource_binder = pipeline->resource_binder();
resource_binder->vertex_buffer(vertex_buffer->get_ptr(0), 0);
cmdlist->bind_resources(resource_binder);
// Render the triangle
cmdlist->draw(3, 0);
// End rendering
@@ -113,10 +110,9 @@ class SampleApp : public App {
}

public:
std::unique_ptr<Pipeline> pipeline{nullptr};
std::unique_ptr<RasterResources> raster_resources{nullptr};
std::unique_ptr<Pipeline> pipeline;

std::unique_ptr<DeviceAllocationGuard> vertex_buffer{nullptr};
std::unique_ptr<DeviceAllocationGuard> vertex_buffer;
};

int main() {
27 changes: 14 additions & 13 deletions taichi/codegen/spirv/spirv_codegen.cpp
Original file line number Diff line number Diff line change
@@ -91,7 +91,7 @@ class TaskCodegen : public IRVisitor {

void fill_snode_to_root() {
for (int root = 0; root < compiled_structs_.size(); ++root) {
for (auto &[node_id, node] : compiled_structs_[root].snode_descriptors) {
for (auto [node_id, node] : compiled_structs_[root].snode_descriptors) {
snode_to_root_[node_id] = root;
}
}
@@ -108,6 +108,9 @@ class TaskCodegen : public IRVisitor {
kernel_function_ = ir_->new_function(); // void main();
ir_->debug_name(spv::OpName, kernel_function_, "main");

compile_args_struct();
compile_ret_struct();

if (task_ir_->task_type == OffloadedTaskType::serial) {
generate_serial_kernel(task_ir_);
} else if (task_ir_->task_type == OffloadedTaskType::range_for) {
@@ -1746,21 +1749,22 @@ class TaskCodegen : public IRVisitor {
std::vector<spirv::Value> buffers;
if (caps_->get(DeviceCapability::spirv_version) > 0x10300) {
buffers = shared_array_binds_;
std::unordered_set<BufferInfo, BufferInfoHasher> unique_bufs;
// One buffer can be bound to different bind points but has to be unique
// in OpEntryPoint interface declarations.
// From Spec: before SPIR-V version 1.4, duplication of these interface id
// is tolerated. Starting with version 1.4, an interface id must not
// appear more than once.
std::unordered_set<spirv::Value, spirv::ValueHasher> entry_point_values;
for (const auto &bb : task_attribs_.buffer_binds) {
for (auto &it : buffer_value_map_) {
if (it.first.first == bb.buffer) {
entry_point_values.insert(it.second);
if (unique_bufs.count(bb.buffer) == 0) {
for (auto &it : buffer_value_map_) {
if (it.first.first == bb.buffer) {
buffers.push_back(it.second);
}
}
unique_bufs.insert(bb.buffer);
}
}
buffers.insert(buffers.end(), entry_point_values.begin(),
entry_point_values.end());
}
ir_->commit_kernel_function(kernel_function_, "main", buffers,
group_size); // kernel entry
@@ -2244,16 +2248,12 @@ class TaskCodegen : public IRVisitor {
}

if (buffer.type == BufferType::Args) {
compile_args_struct();

buffer_binding_map_[key] = 0;
buffer_value_map_[key] = args_buffer_value_;
return args_buffer_value_;
}

if (buffer.type == BufferType::Rets) {
compile_ret_struct();

buffer_binding_map_[key] = 1;
buffer_value_map_[key] = ret_buffer_value_;
return ret_buffer_value_;
@@ -2537,7 +2537,7 @@ void KernelCodegen::run(TaichiKernelAttributes &kernel_attribs,

size_t last_size;
bool success = true;
{
do {
last_size = optimized_spv.size();
bool result = false;
TI_ERROR_IF(
@@ -2546,8 +2546,9 @@ void KernelCodegen::run(TaichiKernelAttributes &kernel_attribs,
"SPIRV optimization failed");
if (result) {
success = false;
break;
}
}
} while (last_size != optimized_spv.size());

TI_TRACE("SPIRV-Tools-opt: binary size, before={}, after={}",
task_res.spirv_code.size(), optimized_spv.size());
6 changes: 5 additions & 1 deletion taichi/codegen/spirv/spirv_ir_builder.cpp
Original file line number Diff line number Diff line change
@@ -835,7 +835,11 @@ Value IRBuilder::fetch_texel(Value texture_var,
// OpImageFetch requires operand with OpImageType
// We have to extract the underlying OpImage from OpSampledImage here
SType image_type = get_underlying_image_type(f32_type(), args.size());
Value image_val = make_value(spv::OpImage, image_type, sampled_image);
Value image_val = new_value(image_type, ValueKind::kNormal);

ib_.begin(spv::OpImage)
.add_seq(image_type, image_val, sampled_image)
.commit(&function_);

Value uv;
if (args.size() == 1) {
10 changes: 0 additions & 10 deletions taichi/codegen/spirv/spirv_ir_builder.h
Original file line number Diff line number Diff line change
@@ -86,16 +86,6 @@ struct Value {
SType stype;
// Additional flags about the value
ValueKind flag{ValueKind::kNormal};

bool operator==(const Value &rhs) const {
return id == rhs.id;
}
};

struct ValueHasher {
size_t operator()(const spirv::Value &v) const {
return std::hash<uint32_t>()(v.id);
}
};

// Represent the SPIRV Label
31 changes: 24 additions & 7 deletions taichi/rhi/cpu/cpu_device.h
Original file line number Diff line number Diff line change
@@ -11,10 +11,33 @@
namespace taichi::lang {
namespace cpu {

class CpuResourceBinder : public ResourceBinder {
public:
~CpuResourceBinder() override {
}

void rw_buffer(uint32_t set,
uint32_t binding,
DevicePtr ptr,
size_t size) override{TI_NOT_IMPLEMENTED};
void rw_buffer(uint32_t set,
uint32_t binding,
DeviceAllocation alloc) override{TI_NOT_IMPLEMENTED};

void buffer(uint32_t set,
uint32_t binding,
DevicePtr ptr,
size_t size) override{TI_NOT_IMPLEMENTED};
void buffer(uint32_t set, uint32_t binding, DeviceAllocation alloc) override{
TI_NOT_IMPLEMENTED};
};

class CpuPipeline : public Pipeline {
public:
~CpuPipeline() override {
}

ResourceBinder *resource_binder() override{TI_NOT_IMPLEMENTED};
};

class CpuCommandList : public CommandList {
@@ -23,11 +46,7 @@ class CpuCommandList : public CommandList {
}

void bind_pipeline(Pipeline *p) override{TI_NOT_IMPLEMENTED};
RhiResult bind_shader_resources(ShaderResourceSet *res,
int set_index = 0) override{
TI_NOT_IMPLEMENTED};
RhiResult bind_raster_resources(RasterResources *res) override{
TI_NOT_IMPLEMENTED};
void bind_resources(ResourceBinder *binder) override{TI_NOT_IMPLEMENTED};
void buffer_barrier(DevicePtr ptr, size_t size) override{TI_NOT_IMPLEMENTED};
void buffer_barrier(DeviceAllocation alloc) override{TI_NOT_IMPLEMENTED};
void memory_barrier() override{TI_NOT_IMPLEMENTED};
@@ -72,8 +91,6 @@ class CpuDevice : public LlvmDevice {
const LlvmRuntimeAllocParams &params) override;
void dealloc_memory(DeviceAllocation handle) override;

ShaderResourceSet *create_resource_set() override{TI_NOT_IMPLEMENTED};

std::unique_ptr<Pipeline> create_pipeline(
const PipelineSourceDesc &src,
std::string name = "Pipeline") override{TI_NOT_IMPLEMENTED};
30 changes: 24 additions & 6 deletions taichi/rhi/cuda/cuda_device.h
Original file line number Diff line number Diff line change
@@ -11,10 +11,33 @@
namespace taichi::lang {
namespace cuda {

class CudaResourceBinder : public ResourceBinder {
public:
~CudaResourceBinder() override {
}

void rw_buffer(uint32_t set,
uint32_t binding,
DevicePtr ptr,
size_t size) override{TI_NOT_IMPLEMENTED};
void rw_buffer(uint32_t set,
uint32_t binding,
DeviceAllocation alloc) override{TI_NOT_IMPLEMENTED};

void buffer(uint32_t set,
uint32_t binding,
DevicePtr ptr,
size_t size) override{TI_NOT_IMPLEMENTED};
void buffer(uint32_t set, uint32_t binding, DeviceAllocation alloc) override{
TI_NOT_IMPLEMENTED};
};

class CudaPipeline : public Pipeline {
public:
~CudaPipeline() override {
}

ResourceBinder *resource_binder() override{TI_NOT_IMPLEMENTED};
};

class CudaCommandList : public CommandList {
@@ -23,10 +46,7 @@ class CudaCommandList : public CommandList {
}

void bind_pipeline(Pipeline *p) override{TI_NOT_IMPLEMENTED};
RhiResult bind_shader_resources(ShaderResourceSet *res,
int set_index = 0) final{TI_NOT_IMPLEMENTED};
RhiResult bind_raster_resources(RasterResources *res) final{
TI_NOT_IMPLEMENTED};
void bind_resources(ResourceBinder *binder) override{TI_NOT_IMPLEMENTED};
void buffer_barrier(DevicePtr ptr, size_t size) override{TI_NOT_IMPLEMENTED};
void buffer_barrier(DeviceAllocation alloc) override{TI_NOT_IMPLEMENTED};
void memory_barrier() override{TI_NOT_IMPLEMENTED};
@@ -84,8 +104,6 @@ class CudaDevice : public LlvmDevice {
const LlvmRuntimeAllocParams &params) override;
void dealloc_memory(DeviceAllocation handle) override;

ShaderResourceSet *create_resource_set() final{TI_NOT_IMPLEMENTED};

std::unique_ptr<Pipeline> create_pipeline(
const PipelineSourceDesc &src,
std::string name = "Pipeline") override{TI_NOT_IMPLEMENTED};
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