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LLVM Fatal Error: Copy one register into another with a different width #8086
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cc: @listerily , maybe this is related to the boolean type? |
Seems yes. Maybe there is some special code generation rules related to |
This issue is caused by |
Issue: #8086 ### Brief Summary This pull request adds support for bool types in `TaskCodeGenCUDA::create_intrinsic_load` which solves bit width issue on CUDA runtime. The problem was that `nvvm_ldg_global_i` does not support 1 bit integer. So we cast pointers and values to `i8` to solve this issue. ### Walkthrough + Added value and pointer casting in `TaskCodeGenCUDA::create_intrinsic_load` + Added test case --------- Co-authored-by: pre-commit-ci[bot] <66853113+pre-commit-ci[bot]@users.noreply.github.com>
Hi! Your issue has been solved and it has been merged into master. Additionally, default values are not supported in taichi dataclasses. Please remove default values in S like this: @ti.dataclass
class S:
i: ti.i16
b: bool |
repro:
this throws:
The problem looks to be the
b:bool = False
member, because removing it or changing its type removes the error.The text was updated successfully, but these errors were encountered: