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[rtl] fix minor VHDL coding style issue #763

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Jan 10, 2024
Merged

[rtl] fix minor VHDL coding style issue #763

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20c6633
[rtl] fix minor VHDL coding style issue
stnolting Jan 10, 2024
9308724
[CHANGELOG] add v1.9.2.11
stnolting Jan 10, 2024
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1 change: 1 addition & 0 deletions CHANGELOG.md
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Expand Up @@ -30,6 +30,7 @@ mimpid = 0x01040312 -> Version 01.04.03.12 -> v1.4.3.12

| Date | Version | Comment | Link |
|:----:|:-------:|:--------|:----:|
| 10.01.2024 | 1.9.2.11 | minor HDL fix (introduced in v1.9.2.9) | [#763](https://github.com/stnolting/neorv32/pull/763) |
| 10.01.2024 | 1.9.2.10 | re-add MTIME system time output to processor top (`mtime_time_o`) | [#762](https://github.com/stnolting/neorv32/pull/762) |
| 08.01.2024 | 1.9.2.9 | minor rtl code cleanups | [#760](https://github.com/stnolting/neorv32/pull/760) |
| 06.01.2024 | 1.9.2.8 | :sparkles: add timer-capture mode to General Purpose Timer (GPTMR); :warning: remove "single-shot" mode, change control register layout | [#759](https://github.com/stnolting/neorv32/pull/759) |
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8 changes: 4 additions & 4 deletions rtl/core/neorv32_cpu_cp_shifter.vhd
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Expand Up @@ -86,7 +86,7 @@ begin
serial_shifter:
if not FAST_SHIFT_EN generate

serial_shifter: process(rstn_i, clk_i)
serial_shifter_core: process(rstn_i, clk_i)
begin
if (rstn_i = '0') then
shifter.busy <= '0';
Expand Down Expand Up @@ -114,7 +114,7 @@ begin
end if;
end if;
end if;
end process serial_shifter;
end process serial_shifter_core;

-- shift control/output --
shifter.done <= '1' when (or_reduce_f(shifter.cnt(shifter.cnt'left downto 1)) = '0') else '0';
Expand All @@ -130,7 +130,7 @@ begin
if FAST_SHIFT_EN generate

-- shifter core --
barrel_shifter: process(rs1_i, shamt_i, ctrl_i, bs_level)
barrel_shifter_core: process(rs1_i, shamt_i, ctrl_i, bs_level)
begin
-- input layer: convert left shifts to right shifts by bit-reversal --
if (ctrl_i.ir_funct3(2) = '0') then -- is left shift?
Expand All @@ -147,7 +147,7 @@ begin
bs_level(i) <= bs_level(i+1);
end if;
end loop;
end process barrel_shifter;
end process barrel_shifter_core;

-- pipeline register --
barrel_shifter_buf: process(rstn_i, clk_i)
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2 changes: 1 addition & 1 deletion rtl/core/neorv32_package.vhd
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Expand Up @@ -56,7 +56,7 @@ package neorv32_package is

-- Architecture Constants -----------------------------------------------------------------
-- -------------------------------------------------------------------------------------------
constant hw_version_c : std_ulogic_vector(31 downto 0) := x"01090210"; -- hardware version
constant hw_version_c : std_ulogic_vector(31 downto 0) := x"01090211"; -- hardware version
constant archid_c : natural := 19; -- official RISC-V architecture ID
constant XLEN : natural := 32; -- native data path width

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