[rtl] instruction prefetch buffer (IPB) improvements #455
Add this suggestion to a batch that can be applied as a single commit.
This suggestion is invalid because no changes were made to the code.
Suggestions cannot be applied while the pull request is closed.
Suggestions cannot be applied while viewing a subset of changes.
Only one suggestion per line can be applied in a batch.
Add this suggestion to a batch that can be applied as a single commit.
Applying suggestions on deleted lines is not supported.
You must change the existing code in this line in order to create a valid suggestion.
Outdated suggestions cannot be applied.
This suggestion has been applied or marked resolved.
Suggestions cannot be applied from pending reviews.
Suggestions cannot be applied on multi-line comments.
Suggestions cannot be applied while the pull request is queued to merge.
Suggestion cannot be applied right now. Please check back later.
The
CPU_IPB_ENTRIES
generic (defining the depth of the instruction prefetch buffer) can now be as small as "1". If theC
ISA extensions is enabled andCPU_IPB_ENTRIES = 1
is configured, the actual IPB depth is set to "2" automatically (as this is required for handling unaligned 32bit instructions).Configuring
CPU_IPB_ENTRIES = 1
allows reduced hardware utilization. The exemplary hardware implementation results have been updated accordingly.