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[rtl] add hardware reset to IO/peripheral devices #334

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1 change: 1 addition & 0 deletions CHANGELOG.md
Original file line number Diff line number Diff line change
Expand Up @@ -32,6 +32,7 @@ mimpid = 0x01040312 => 01.04.03.12 => Version 01.04.03.12 => v1.4.3.12

| Date (*dd.mm.yyyy*) | Version | Comment |
|:----------:|:-------:|:--------|
| 03.06.2022 | 1.7.2.2 | :sparkles: (finally) added a **dedicated hardware reset** to all IO/peripheral devices; [#334](https://github.com/stnolting/neorv32/pull/334) |
| 02.06.2022 | 1.7.2.1 | :sparkles: add **watchdog** pause flag to stop watchdog timeout counter when CPU is in sleep mode; [#331](https://github.com/stnolting/neorv32/pull/331) |
| 02.06.2022 | [**:rocket:1.7.2**](https://github.com/stnolting/neorv32/releases/tag/v1.7.2) | **New release** |
| 01.06.2022 | 1.7.1.11 | :bug: fixed bug in **debugger's** single-stepping mode (bug introduced with version 1.7.1.9); [#329](https://github.com/stnolting/neorv32/pull/329) |
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36 changes: 16 additions & 20 deletions docs/datasheet/soc.adoc
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Expand Up @@ -1362,8 +1362,8 @@ in this scenario. It is pre-initialized (by the bitstream) with the actual appli

In contrast, boot scenario **2b** uses a processor-external IMEM (<<_mem_int_imem_en>> = _false_). In this scenario the
system designer is responsible for providing an initialized external memory that contains the actual application to be executed.
If the external is not already initialized after reset, a simple ROM containing a "polling loop" can be implemented that is
exited as soon as the application logic has finished initializing the memory with the acutal application code.
If the external memory is not already initialized after reset, a simple ROM containing a "polling loop" can be implemented that is
exited as soon as the application logic has finished initializing the memory with the actual application code.



Expand All @@ -1372,23 +1372,17 @@ exited as soon as the application logic has finished initializing the memory wit
:sectnums:
=== Processor-Internal Modules

Basically, the processor is a SoC consisting of the NEORV32 CPU, peripheral/IO devices, embedded
Basically, the NEORV32 processor is a SoC consisting of the NEORV32 CPU, peripheral/IO devices, embedded
memories, an external memory interface and a bus infrastructure to interconnect all units. Additionally, the
system implements an internal reset generator and a global clock generator/divider.


**Internal Reset Generator**

[IMPORTANT]
Most processor-internal modules - except for the CPU and the watchdog timer - do not have a dedicated
reset signal. However, all devices can be reset by software by clearing the corresponding unit's control
register. The automatically included application start-up code (`crt0.S`) will perform a software-reset of all
modules to ensure a clean system reset state. This feature can be manually deactivated if required. See section
<<_start_up_code_crt0>> for more information.

The hardware reset signal of the processor can either be triggered via the external reset pin (`rstn_i`, low-active),
by the internal watchdog timer (if implemented) or by the on-chip debugger. The external reset signal `rstn_i`
is extended to be active for at least 4 cycles when triggered.
The internal reset generator is responsible for converting controlling the processor-global system reset.
This system reset is either triggered via the external reset pin (`rstn_i`, low-active), by the internal
watchdog timer (if implemented) or by the on-chip debugger. If any of those sources issues an active reset
the system reset is activated for at least 4 cycles.


**Internal Clock Divider**
Expand Down Expand Up @@ -1436,21 +1430,23 @@ be written with a byte-wide granularity.

.Unimplemented Modules
[NOTE]
When accessing an IO device that hast not been implemented (via the according generic), a
load/store access fault exception is triggered.
When accessing an IO device that hast not been implemented (disabled via the according generic), a
load or store access fault exception is triggered.

.Module Reset
[NOTE]
Most of the IO devices do not have a dedicated hardware reset at all. Instead, the devices are reset via software by
writing zero to the unit's control register. A general software-based reset of **all** IO/peripheral devices is done by the
application start-up code `crt0.S`. This feature can be manually deactivated if required. See section
<<_start_up_code_crt0>> for more information.
All processor-internal modules provide a dedicated hardware reset, which can be triggered by the external reset
signal, the watchdog timer or the on-chip debugger. When active, the system-wide reset will ensure that all
module interface register (like the control register) are reset to all-zero. Software can trigger a module reset
by clearing the enable bit of the module's control register.

.Software Access
[TIP]
You should use the provided core software library to interact with the peripheral devices. This
Use the provided <<_core_libraries>> to interact with the peripheral devices. This
prevents incompatibilities with future versions, since the hardware driver functions handle all the
register and register bit accesses.

.CMSIS System Description View (SV)
[TIP]
A CMSIS-SVD-compatible **System View Description (SVD)** file including all peripherals is available in `sw/svd`.

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25 changes: 8 additions & 17 deletions docs/datasheet/software.adoc
Original file line number Diff line number Diff line change
Expand Up @@ -454,34 +454,25 @@ and placed right before the actual application code so it gets executed right af
The `crt0.S` start-up performs the following operations:

[start=1]
. Disable interrupts globally by clearing <<_mstatus>>`.mie`.
. Initialize all integer registers `x1 - x31` (or just `x1 - x15` when using the `E` CPU extension) to a defined value.
. Initialize all CPU core CSRs and also install a default "dummy" trap handler for _all_ exceptions.
. Disable interrupts globally by clearing <<_mstatus>> (including `mie`).
. Initialize all integer registers `x1 - x31` (or just `x1 - x15` when using the `E` CPU extension is enabled) to a defined value.
. Initialize all CPU core CSRs and also install a default "dummy" trap handler for _all_ exceptions. This is used for the very early boot
phase where the application might not provide a trap handling yet.
** Set <<_mstatus>>`.mpp` to `11`; previous mode is machine mode.
** All interrupt sources are disabled and all pending interrupts are cleared.
. Initialize the global pointer `gp` and the stack pointer `sp` according to the <<_ram_layout>> provided by the linker script.
during the early boot phase.
. Clear all counter CSRs and stop auto-increment.
. **Clear IO area**: Write zero to all memory-mapped registers within the IO region (`iodev` section) resetting all IO/peripheral modules.
This step can be disabled by the user; see note below.
If certain devices have not been implemented, a bus access fault exception will occur, which is captured by the dummy trap handler.
. Clear the `.bss` section defined by the linker script.
. Copy read-only data from the `.text` section to the `.data` section to set initialized variables.
. Call and execute all _constructors_ (if there are any)
. Call the application's `main` function (with _no_ arguments: `argc` = `argv` = 0).
. If the main function returns...
. Call the application's `main` function (with no arguments: `argc` = `argv` = 0).
. If `main` returns:
** interrupts are globally disabled by clearing <<_mstatus>>`.mie`.
** the return value is copied to the <<_mscratch>> CSR to allow inspection by the on-chip debugger.
** call and execute all _destructors_ (if there are any).
** an optional <<_after_main_handler>> is called (if defined at all).
** the CPU enters sleep mode (using the `wfi` instruction) or halts in an endless loop (if `wfi` "returns").

.Disabling automatic software reset of all IO/peripheral devices during executable boot
[IMPORTANT]
The automatic "software reset" performed by the crt0 start-up code can be manually disabled. This can be handy for certain executables,
which are booted by a (custom) bootloader and rely on certain IO initializations performed by the bootloader. To disable the automatic
reset of all IO/peripheral modules the `NO_IO_RESET` symbol needs to be _defined_ before compilation using the makefile's `USER_FLAGS`
variable. Furthermore, all object files need to be recompiled using the `clean_all` target.
Example: `$ make USER_FLAGS+=-DNO_IO_RESET clean_all exe`
** the CPU enters sleep mode (using the `wfi` instruction) or remains in an endless loop (if `wfi` "returns").

.Bootloader Start-Up Code
[NOTE]
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