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[TRNG] add optional/configurable data FIFO #316

Merged
merged 8 commits into from
May 18, 2022
Merged

[TRNG] add optional/configurable data FIFO #316

merged 8 commits into from
May 18, 2022

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@stnolting stnolting commented May 17, 2022

This PR adds an optional and configurable data FIFO to the processor's true random number generator module (TRNG).

The TRNG requires at least 16x8=128 cycles to generate a new RND data bytes (see stnolting/neoTRNG for more information). The new optional FIFO provides something like a "random data pool" by constantly sampling data from the TRNG core.

  • The TRNG FIFO is configured by the new top generic IO_TRNG_FIFO: default value is 1, minimal value is 1, has to be a power of two.
  • The FIFO can be cleared at any time either by disabling and re-enabling the TRNG module or via the new control register bit TRNG_CTRL_FIFO_CLR (NEORV32_TRNG.CTRL bit 28; write-only, auto clears).

@stnolting stnolting added enhancement New feature or request HW Hardware-related labels May 17, 2022
@stnolting stnolting self-assigned this May 17, 2022
@stnolting stnolting marked this pull request as ready for review May 17, 2022 15:30
@stnolting stnolting merged commit 66217a9 into main May 18, 2022
@stnolting stnolting deleted the add_trng_fifo branch May 18, 2022 17:47
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