slink variables rx_tmp_v and tx_tmp_v have wrong size

[LeFl0w]

Hi,
both variables rx_tmp_v and tx_tmp_v have an upper bound equal to SLINK_NUM_RX-1 and SLINK_NUM_TX-1.

These variables are used as:

•       irq_rx_o <= or_reduce_f(irq_rx_en and rx_tmp_v);
  

•       irq_tx_o <= or_reduce_f(irq_tx_en and tx_tmp_v);
  

and refereing to definition of signals:

•   signal irq_rx_en   : std_ulogic_vector(7 downto 0);
  

•  signal irq_tx_en   : std_ulogic_vector(7 downto 0);
  

When doing the AND between the two of them with a SLINK_NUM_RX (or SLINK_NUM_TX) not equal to 8, the upper bound do not match.
This lead to a synthesis error on Vivdao 2021.1.

As soon as the vector is initialized entirely rx_tmp_v := (others => '0');
and tx_tmp_v := (others => '0');

it would be better to set the upper bound of both rx_tmp_v and tx_tmp_v to 7.

[stnolting]

Thanks for the hint!
I will have a look and fix that.