document OTP fuses and secure boot flow #8
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From the forum post:
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The manual says that something called
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I was able to get a bunch of data into the A full header is Here is my config; not everything shows up though, maybe the tool wasn't that complete?
invoked like this: commonthe funny numbers are the EC parameters the last 4x sblThe first field here is the EC key to use; it can be |
This is based on what the vendor tool does. No clue how the secure boot flow or setup really works. Reference: starfive-tech/Tools#8 Signed-off-by: Daniel Maslowski <[email protected]>
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addendum to the sbl part: the next fields after the checksum are
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On the EC keys creating a key is also described in the config file I provided above; taken from https://developers.yubico.com/PIV/Guides/Generating_keys_using_OpenSSL.html Anyway, that gets us a PEM format file like this: let's quick-hack that to a hex representation https://gchq.github.io/CyberChef/#recipe=From_Base64('A-Za-z0-9%2B/%3D',true,false)To_Hex('Space',0) I've marked the relevant parts looking at the resulting header file, it appears that the last two parts are just reversed, respectively, which becomes now I have no clue what exactly the pieces are; just look at then OpenSSL manual or whatever or recap your crypto intro 101 on elliptic curves to get an idea :-) Addendum: Note that the format is not too excellent for human processing; it is 15 bytes |
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On the OTPC block again OTPC = One-Time Programmable Configuration
I read this as blocks of 64x 32 bytes each, which has repeating entries for me on a Milk-V Mars. This here is repeated 64 times, the first block Note: then comes 64 times all and then a block of this 64 times then all Note: boot modesIf XIP flash is disabled in OTP configuration, system cannot boot from XIP flash. The On-Chip boot ROM is 32 KB. The boot mode and boot options could be loaded from the SYSCON status registers. from the manual, Table 2-2 System Boot Process
my OTP config in first line:
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@MichaelZhuxx any comment on this so far? This is very tedious... would be great to have some support here. 😬 Thank you! |
The struct is based on what the original vendor tool does. No clue yet how the secure boot flow or setup really works. Reference: starfive-tech/Tools#8 Add a Default impl. Use CRC_32_ISO_HDLC from the crc crate as figured out by https://github.com/jonirrings/vf2-header :) Signed-off-by: Daniel Maslowski <[email protected]>
The struct is based on what the original vendor tool does. No clue yet how the secure boot flow or setup really works. Reference: starfive-tech/Tools#8 Add a Default impl. Use CRC_32_ISO_HDLC from the crc crate as figured out by https://github.com/jonirrings/vf2-header :) Signed-off-by: Daniel Maslowski <[email protected]>
The struct is based on what the original vendor tool does. No clue yet how the secure boot flow or setup really works. Reference: starfive-tech/Tools#8 Add a Default impl. Use CRC_32_ISO_HDLC from the crc crate as figured out by https://github.com/jonirrings/vf2-header :) Signed-off-by: Daniel Maslowski <[email protected]>
The struct is based on what the original vendor tool does. No clue yet how the secure boot flow or setup really works. Reference: starfive-tech/Tools#8 Add a Default impl. Use CRC_32_ISO_HDLC from the crc crate as figured out by https://github.com/jonirrings/vf2-header :) Signed-off-by: Daniel Maslowski <[email protected]>
The struct is based on what the original vendor tool does. No clue yet how the secure boot flow or setup really works. Reference: starfive-tech/Tools#8 Add a Default impl. Use CRC_32_ISO_HDLC from the crc crate as figured out by https://github.com/jonirrings/vf2-header :) Signed-off-by: Daniel Maslowski <[email protected]>
The struct is based on what the original vendor tool does. No clue yet how the secure boot flow or setup really works. Reference: starfive-tech/Tools#8 Add a Default impl. Use CRC_32_ISO_HDLC from the crc crate as figured out by https://github.com/jonirrings/vf2-header :) Signed-off-by: Daniel Maslowski <[email protected]>
The struct is based on what the original vendor tool does. No clue yet how the secure boot flow or setup really works. Reference: starfive-tech/Tools#8 Add a Default impl. Use CRC_32_ISO_HDLC from the crc crate as figured out by https://github.com/jonirrings/vf2-header :) Signed-off-by: Daniel Maslowski <[email protected]>
The struct is based on what the original vendor tool does. No clue yet how the secure boot flow or setup really works. Reference: starfive-tech/Tools#8 Add a Default impl. Use CRC_32_ISO_HDLC from the crc crate as figured out by https://github.com/jonirrings/vf2-header :) Signed-off-by: Daniel Maslowski <[email protected]>
The struct is based on what the original vendor tool does. No clue yet how the secure boot flow or setup really works. Reference: starfive-tech/Tools#8 Add a Default impl. Use CRC_32_ISO_HDLC from the crc crate as figured out by https://github.com/jonirrings/vf2-header :) Signed-off-by: Daniel Maslowski <[email protected]>
The struct is based on what the original vendor tool does. No clue yet how the secure boot flow or setup really works. Reference: starfive-tech/Tools#8 Add a Default impl. Use CRC_32_ISO_HDLC from the crc crate as figured out by https://github.com/jonirrings/vf2-header :) Signed-off-by: Daniel Maslowski <[email protected]>
In #1, we discussed the basics of creating a valid header for a simple boot.
Still open is
For reference:
I would like to provision my JH7110 SoCs with secure boot and need this documentation.
I can write the tools for that myself and would integrate support in oreboot.
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