firmware: drivers: sx127x: config function #60

spacelab-ufsc · Jan 2, 2023 · 665ef7a · 665ef7a
1 parent fbd6ec8
commit 665ef7a
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Showing 2 changed files with 95 additions and 9 deletions.
diff --git a/firmware/drivers/sx127x/sx127x.c b/firmware/drivers/sx127x/sx127x.c
@@ -38,8 +38,8 @@
 
 #include "sx127x.h"
 
-uint8_t header_mode;
-uint8_t payload_length = 0;
+static uint8_t header_mode;
+static uint8_t payload_length = 0;
 
 int sx127x_init(void)
 {
@@ -415,7 +415,7 @@ int sx127x_set_payload_len(uint8_t len)
     return sx127x_write_reg(SX127X_REG_PAYLOAD_LENGTH, len);
 }
 
-int sx127x_tx_power(uint8_t pwr)
+int sx127x_set_tx_power(uint8_t pwr)
 {
     int err = -1;
 
@@ -536,7 +536,58 @@ int sx127x_power_on_reset(void)
 
 int sx127x_config(void)
 {
-    return -1;
+    /* Sleep mode */
+    sx127x_write_reg(SX127X_REG_OP_MODE, SX127X_OP_MODE_SLEEP | SX127X_FREQUENCY_BAND);
+    sx127x_delay_ms(5);
+
+    /* External Crystal */
+    sx127x_write_reg(SX127X_REG_TCXO, SX127X_TCXO_EXT_CRYSTAL | SX127X_TCXO_REGTCXO_RESERVED);
+
+    /* LoRa Mode */
+    sx127x_write_reg(SX127X_REG_OP_MODE, SX127X_LONG_RANGE_MODE_LORA | SX127X_FREQUENCY_BAND);
+
+    /* Setting Frequency */
+    sx127x_set_frequency(433500000);
+
+    /* Maximum Power, 20 dB */
+    sx127x_set_tx_power(0x0f);
+
+    /* Close OCP */
+    sx127x_write_reg(SX127X_REG_OCP, SX127X_OCPON_OFF| 0x0B);
+    //sx127x_write_reg(adr, val)
+
+    /* Enable LNA */
+    sx127x_write_reg(SX127X_REG_LNA, SX127X_LNA_GAIN_G1 | SX127X_LNA_BOOSTHF_1);
+
+    /* RF Params */
+    /*BW = 62.5 Hz, spreading factor = 9, coding rate = 4/5, explicit header mode */
+    header_mode = SX127X_EXPLICIT_HEADER_MODE;
+    sx127x_set_header_mode(header_mode);
+    sx127x_set_rf_param(SX127X_BW_62P5K, SX127X_CODING_RATE_1P25, SX127X_SPREADING_FACTOR_9, SX127X_PAYLOAD_CRC_ON);
+
+    /* LNA */
+    sx127x_write_reg(SX127X_REG_MODEM_CONFIG_3, SX127X_LOWDATARATEOPTIMIZE_DSBLD);
+
+    /* Maximum RX time out */
+    sx127x_set_rx_timeout(0x3ff);
+
+    // Preamble 12+ 4.25 bytes
+    sx127x_set_preamble_len(12);
+
+    /* 20 dBm on PA_BOOST pin */
+    sx127x_write_reg(SX127X_REG_PA_DAC, SX127X_REGPADAC_RESERVED | SX127X_20DB_OUTPUT_ON);
+
+    /* No hopping */
+    sx127x_write_reg(SX127X_REG_HOP_PERIOD, 0x00);
+
+    /*DIO5 = ModeReady, DIO4=CadDetected */
+    sx127x_write_reg(SX127X_REG_DIO_MAPPING_2, SX127X_DIO4_CADDETECTED | SX127X_DIO5_MODEREADY);
+
+    /* Standby mode */
+    sx127x_write_reg(SX127X_REG_OP_MODE, SX127X_OP_MODE_STBY | SX127X_FREQUENCY_BAND);
+
+    /* Set Payload Length 10 bytes in explicit mode */
+    return sx127x_set_payload_len(10);
 }
 
 int sx127x_set_ant_switch(sx127x_mode_t mode)

diff --git a/firmware/drivers/sx127x/sx127x.h b/firmware/drivers/sx127x/sx127x.h
@@ -166,7 +166,7 @@
 #define SX127X_REG_HIGH_BW_OPTIMIZE_2       0x3AU       /**< Sensitivity optimisation for 500 kHz bandwidth. */
 #define SX127X_REG_INVERT_IQ_2              0x3BU       /**< Optimize for inverted IQ. */
 
-/* Register Op Mode */
+/* Register Op Mode values*/
 #define SX127X_LONG_RANGE_MODE_FSK          0x00U
 #define SX127X_LONG_RANGE_MODE_LORA         0x80U
 #define SX127X_MODULATION_TYPE_FSK          0x00U
@@ -182,7 +182,7 @@
 #define SX127X_OP_MODE_RX_SINGLE            0x06U
 #define SX127X_OP_MODE_CAD                  0x07U
 
-/* Register Modem Config 1 */
+/* Register Modem Config 1 values*/
 #define SX127X_BW_7P8K                      0x00U
 #define SX127X_BW_10p4K                     0x10U
 #define SX127X_BW_15P6K                     0x20U
@@ -200,7 +200,7 @@
 #define SX127X_IMPLICIT_HEADER_MODE         0x01U
 #define SX127X_EXPLICIT_HEADER_MODE         0x00U
 
-/* Register Modem Config 2 */
+/* Register Modem Config 2 values*/
 #define SX127X_SPREADING_FACTOR_6           0x60U
 #define SX127X_SPREADING_FACTOR_7           0x70U
 #define SX127X_SPREADING_FACTOR_8           0x80U
@@ -213,10 +213,45 @@
 #define SX127X_PAYLOAD_CRC_ON               0x04U
 #define SX127X_PAYLOAD_CRC_OFF              0x00U
 
-/* Regisgter PA Config values */
+/* Register Modem Config 3 values */
+#define SX127X_LOWDATARATEOPTIMIZE_DSBLD    0x00U
+#define SX127X_LOWDATARATEOPTIMIZE_ENBLD    0x08U
+#define SX127X_AGC_AUTO_ON                  0x04U
+
+/* Register PA Config values */
 #define SX127X_PA_SELECT_RFO                0x00U
 #define SX127X_PA_SELECT_PA_BOOST           0x80U
 
+/* Register OCP values */
+#define SX127X_OCPON_ON                     0x20U
+#define SX127X_OCPON_OFF                    0x00U
+
+/* Register TCXO values */
+#define SX127X_TCXO_EXT_CRYSTAL             0x00U
+#define SX127X_TCXO_INPUT_ON                0x10U
+#define SX127X_TCXO_REGTCXO_RESERVED        0x09U
+
+/* Register LNA values */
+#define SX127X_LNA_GAIN_G1                   0x20U
+#define SX127X_LNA_GAIN_G2                   0x40U
+#define SX127X_LNA_GAIN_G3                   0x60U
+#define SX127X_LNA_GAIN_G4                   0x80U
+#define SX127X_LNA_GAIN_G5                   0xA0U
+#define SX127X_LNA_GAIN_G6                   0xC0U
+#define SX127X_LNA_BOOSTHF_0                 0x00U
+#define SX127X_LNA_BOOSTHF_1                 0x03U
+
+/* Register PA DAC values */
+#define SX127X_REGPADAC_RESERVED             0x80U
+#define SX127X_20DB_OUTPUT_ON                0x07U
+#define SX127X_20DB_OUTPUT_OFF               0x04U
+
+/* Register DIOMAPPING2 values */
+#define SX127X_DIO4_CADDETECTED              0x00U
+#define SX127X_DIO4_PLLLOCK                  0x40U
+#define SX127X_DIO5_MODEREADY                0x00U
+#define SX127X_DIO5_CLKOUT                   0x10U
+
 /* The first bit in SPI address byte is a wnr bit, 1 for write access , 0 for read access */
 #define SX127X_SPI_WNR                      0x80U
 
@@ -378,7 +413,7 @@ int sx127x_set_payload_len(uint8_t len);
  *
  * \return The status/error code.
  */
-int sx127x_tx_power(uint8_t pwr);
+int sx127x_set_tx_power(uint8_t pwr);
 
 /**
  * \brief Sets RX timeout.