SpikeHard

This is the open-source release of "SpikeHard: Efficiency-Driven Neuromorphic Hardware for Heterogeneous Systems-on-Chip" (paper link). To cite this repository, please refer to the citation subsection. This repository includes all code and scripts needed to generate a SpikeHard accelerator and integrate it into an ESP SoC.

Quick Start

Environment setup:

git clone --recursive --depth 1 https://github.com/sld-columbia/esp.git
git clone https://github.com/sld-columbia/spikehard.git
cd spikehard
sudo apt install iverilog # install Icarus Verilog
script/install_env.sh
source script/setup_env.sh

Be sure to clone ESP in the same directory as SpikeHard but not inside SpikeHard, and follow the ESP documentation to properly setup ESP including the necessary toolchains.

To restructure the original 64x64 VMM-O model to 32x32 and tune the tick period as well, run the following:

python hardware/util/to_unit_tests.py vmm_o 0 64 64 32 32

This will output a test that can be run as follows:

pytest -o log_cli=True -s -v --log-cli-level=DEBUG hardware/tb/tests/networks/altered/vmm_o/test_vmm_o_32.py

Please note that these Python tests require the Icarus Verilog simulator to be installed (e.g. via sudo apt install iverilog). And it also requires myhdl bindings to be built, which is automatically done by script/install_env.sh, but can also be done as follows:

cd hardware/tb/iverilog
make clean
make

To synthesise an implementation with 32x32 VMM-O and deploy it to FPGA, all necessary environment variables required by ESP, such as the path to your Xilinx Vivado installation, should first be specified (see ESP docs). Once this is all configured, run:

python hardware/util/fpga_util.py -c 1 32 32 -m vmm_o -s

This generates a new SoC and opens the ESP SoC Generator GUI. Be sure to include in the SoC an instance of SpikeHard with implementation basic_dma64 if the CPU is 64-bit, or basic_dma32 if the CPU is 32-bit; never use impl. After configuration, the SoC will be synthesised then "unprepared". To prepare the SoC, run:

python hardware/util/fpga_util.py -c 1 32 32 -m vmm_o -p

To deploy on FPGA, you will likely first need to modify values in esp/socs/xilinx-vcu128-xcvu37p-spikehard/Makefile so that ESP is able to access your FPGA (see ESP docs). Then run:

script/run_linux_fpga.sh

Once logged into the FPGA, you can run a Linux application that offloads VMM-O onto SpikeHard and verifies that it is being executed correctly. To this end, run:

/applications/test/spikehard_rtl.exe

By default, at the end this will output the overall latency from a single run. That being said, this Linux application has several optional arguments:

-m <n>   number of runs to determine average model loading overhead [default <n>=0]
-i <n>   number of runs to determine average invocation overhead [default <n>=0]
-l <n>   number of runs to determine average latency (excluding model and invocation overhead, which default to 0) [default <n>=1]
-t <n>   number of runs to determine average throughput (used by MNIST, not used by VMM) [default <n>=1]
-c <n>   number of clock cycles per tick (i.e. tick period) [default is model-specified]

Once you are done with running a particular SoC implementation, you should unprepare it so that a different implementation can be used instead. To unprepare 32x32 VMM-O for example, run:

python hardware/util/fpga_util.py -c 1 32 32 -m vmm_o -u

To re-prepare it:

python hardware/util/fpga_util.py -c 1 32 32 -m vmm_o -p

Notice that we don't have to re-synthesise the SoC, synthesis is only needed if we generate a new implementation.

SpikeHard should also work with the LEON3 CPU as well as in baremetal, however, this has not been tested in a long time so your mileage may vary.

Citation

To refer to SpikeHard in a publication, please cite the following paper:

@article{10.1145/3609101,
  author = {Clair, Judicael and Eichler, Guy and Carloni, Luca P.},
  title = {{SpikeHard: Efficiency-Driven Neuromorphic Hardware for Heterogeneous Systems-on-Chip}},
  year = {2023},
  volume = {22},
  number = {5s},
  doi = {10.1145/3609101},
  journal = {ACM Trans. Embed. Comput. Syst.},
  articleno = {106},
  numpages = {22}
}

License

SpikeHard is based on RANC, and so a significant portion of code was taken from the RANC repository. Since RANC is released under the permissive MIT License, so is SpikeHard. This license does not apply to code from or generated by ESP, which retains its original license.