feature: allow miso to be absent from SpiBus

schang412 · Jun 20, 2024 · e35a1a5 · e35a1a5
1 parent a80b812
commit e35a1a5
Showing 1 changed file with 11 additions and 2 deletions.
diff --git a/cocotbext/spi/spi.py b/cocotbext/spi/spi.py
@@ -11,6 +11,7 @@
 from typing import Tuple
 
 import cocotb
+from cocotb.binary import BinaryValue
 from cocotb.clock import BaseClock
 from cocotb.triggers import Edge
 from cocotb.triggers import Event
@@ -60,9 +61,13 @@ def __init__(self, bus: SpiBus, config: SpiConfig) -> None:
         # spi signals
         self._sclk = bus.sclk
         self._mosi = bus.mosi
-        self._miso = bus.miso
         self._cs = bus.cs
 
+        if hasattr(bus, 'miso'):
+            self._miso = bus.miso
+        else:
+            self._miso = BinaryValue()
+
         # size of a transfer
         self._config = config
 
@@ -236,9 +241,13 @@ def __init__(self, bus: SpiBus):
 
         self._sclk = bus.sclk
         self._mosi = bus.mosi
-        self._miso = bus.miso
         self._cs = bus.cs
 
+        if hasattr(bus, 'miso'):
+            self._miso = bus.miso
+        else:
+            self._miso = BinaryValue()
+
         self._miso.value = self._config.data_output_idle
 
         self.idle = Event()