Now explains how to, for example, support a Cortex-M55 with FPU and Integer Helium.

Yes it looks weird, but this is how Arm write it now.

I left ARM64 alone, because it's a Microsoft/Apple term but not an Arm term (they have Armv8-A and Armv9-A architectures, which say that A64 instructions are executed when in the Aarch64 state), and I don't want to get into that, especially for a Tier 1 target.