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Support RISC-V unaligned-scalar-mem target feature #110884
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This adds `unaligned-scalar-mem` as an allowed RISC-V target feature. Some RISC-V cores support unaligned access to memory without trapping. On such cores, the compiler could significantly improve code-size and performance when using functions like core::ptr::read_unaligned<u32> by emitting a single load or store instruction with an unaligned address, rather than a long sequence of byte load/store/bitmanip instructions. Enabling the `unaligned-scalar-mem` target feature allows LLVM to do this optimization. Fixes rust-lang#110883
Thanks for the pull request, and welcome! The Rust team is excited to review your changes, and you should hear from @b-naber (or someone else) soon. Please see the contribution instructions for more information. Namely, in order to ensure the minimum review times lag, PR authors and assigned reviewers should ensure that the review label (
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r? rust-lang/compiler |
@bors r- Just realized target features need T-lang signoff. |
@rustbot label +I-lang-nominated
Nominating for T-lang sign off on adding this target feature. Thanks! |
Would this be gated on nightly? |
Discussed in meeting. If this is gated on nightly, we are fine with adding it, and no FCP is required -- just unnominate. If it will be insta-stable, we will rediscuss. |
Thanks @nikomatsakis! This is gated on the unstable @bors r+ rollup |
Rollup of 7 pull requests Successful merges: - rust-lang#110884 (Support RISC-V unaligned-scalar-mem target feature) - rust-lang#111160 (Update serde in workspace and non-synced dependencies) - rust-lang#111168 (Specialize ToString implementation for fmt::Arguments) - rust-lang#111527 (add examples of port 0 binding behavior) - rust-lang#111561 (Include better context for "already exists" error in compiletest) - rust-lang#111633 (Avoid `&format("...")` calls in error message code.) - rust-lang#111679 (Remove libs message about ACPs from triagebot) Failed merges: r? `@ghost` `@rustbot` modify labels: rollup
This adds
unaligned-scalar-mem
as an allowed RISC-V target feature. Some RISC-V cores support unaligned access to memory without trapping. On such cores, the compiler could significantly improve code-size and performance when using functions like core::ptr::read_unaligned by emitting a single load or store instruction with an unaligned address, rather than a long sequence of byte load/store/bitmanip instructions.Enabling the
unaligned-scalar-mem
target feature allows LLVM to do this optimization.Fixes #110883