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Use newtypes for register indices and numbers #617
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Not reviewed the full diff in detail but overall I think this is a nice improvement!
This required splitting many of the AST constructors.
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Is there any chance this could be split up into multiple PRs to make it easier to review? E.g. can the "initial support for E" be a separate PR? |
I suppose, but GitHub also allows review commit-by-commit and that's as fine a granularity as I think makes sense to split it? ETA: I thought having the "Initial support for E extension" as part of the stack would help justify the rest of the changes. I'm happy to punt that to a 2nd PR if it'd make getting the first bit in easier. |
With Zfinx I'm not sure how good an idea this is, it seems to get messy quickly. Also I can't actually see your E support anywhere, the tip of the linked branch is nwf@359fdd3 but that doesn't add E, only factors I out. |
Yeah I think I'm happy with the motivation! I think splitting it up has other advantages:
Could you also split out
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Sorry, I missed a As to the complexity around Zfinx and E, well... I don't think the sail is going to be that hairy, and I think the improved clarity in the type system at all use sites outweighs a little complexity at the one definition site. |
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I think being explicit here is a nice improvement and it would be good to merge this ASAP so we don't accumulate merge conflicts.
I'm not sold given Zfinx; this PR introduces some ugliness there. By introducing new types for everything it ends up having to use the wrong explicit type when previously they were all the same and so there was no wrong type. |
I'm open to suggestions, but the status quo seems somewhat challenging for E support, especially E machines that reuse the resulting voids in the encoding space, without just forking the whole model. IMHO Zfinx being a model run-time decision is a deliberate type confusion, and it'd have been better for it to be a model compile-time decision, especially since it cannot (AFAICT) be changed after initialization. It's not surprising, then, that it results in some violence to the types. In particular, I think it is acceptable to the specification to have an implementation of E and F and not-Zfinx that has 16 GPRs and 32 FPU registers, which means that Would you, @jrtc27, accept the first commit, or first two commits, in this PR on its own, without the subsequent refinement of ( |
Can't we solve the zfinx problem by adding an explicit conversion? IMO you're still using a freg index in the instruction, it just happens to be mapped to a for internally? I also think it's odd this is a runtime option an IMO would be cleaner as compile time. |
Yeah,
A future PR, perhaps. |
No you're not, you're using an X register, there are no F registers.
The whole intent is to reduce compile-time options and have as much configurable at run time as possible. Having something like Zfinx be compile-time option would completely go against that. |
That's true, but we can still have a type abstraction for "register index of a floating point value"? For RV32 Zdinx we could even assert that it's always an even index when converting it to a GPR index?
Reading the spec there is no way to dynamically switch this behaviour at runtime since it seems to be gated on the extension being implemented:
But that point I don't really care about, I just think being explicit about what type of register we are indexing is still useful. |
Well, it looks like we now (again) have tons of conflicting files. Is it worth dusting this off for merge or would it just languish again? |
I think it would be worthwhile, but I can't guarantee it will be merged :( |
We will eventually need to support E, and I haven’t seen any other proposals for how to do that, so it sort of seems like something along these lines is necessary. Even without that aspect, the additional type safety seems like a good thing and is a direction the model is generally moving in (see the recent virtual/physical address new types). So I’d be in favor of it. If you’re concerned about doing the work only for it not to get merged, maybe we can hold off and discuss it at the next weekly meeting to see if we can come to some sort of consensus on if we want to go through with this. |
To be clear, I am not adamant that this PR merge, and if someone has a better proposal, please, go for it. But the lack of structured support for E has bitten CHERIoT already, in that our currently in-tree "throw an exception on invalid register access" approach is subtly wrong (because the model does not model instructions with transactions and sail's sequential/monadic behavior is such that state effects survive thrown exceptions, so the CHERIoT model can, for example, write to a CSR before trapping on a GPR access) and more proper fixes are unpleasant, holographic, and eternal divergences from the upstream model, such as changing all arms of the en-/de-coding definition to have additional |
In preparation for more seriously tackling #523. This PR...
regidx
andregno
to benewtypes
and updates all use sites appropriately.vregidx
fromregidx
(and friends) for Vector (vext) registers, which, AFAIK, are a completely separate set of 32 registers.fregidx
fromregidx
(and friends) for F/D/Zcd/Zcf/Zfa/Zfh and V (again) extensions. There's a little muss and fuss around the definition to do withZfinx
, but otherwise it's also pretty rote.CSR
ast
ctor intoCSRImm
andCSRReg
.This was a slog. Most of the changes can be described as "type-directed" and "mechanical" but were all done... er, artisanally, so some more careful review is probably merited. Perhaps best viewed with word diff, not line diff.
The curious are welcome to look at https://github.com/nwf/sail-riscv/tree/202411-eext to see how I think we can properly support E atop this base, and indeed, most of these changes were motivated or directed by that work, but I would like to get this reviewed independently of that shuffling and further refactoring.