Add base address register as extra argument to ext_data_check_addr hook #5
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…ok to assist with implementing CHERI capability mode.
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In the CHERI case for LOAD and STORE we end up reading rs1 twice which is unfortunate and could be a problem with RMEM. We could avoid this by moving the read and add into the handler in both cases and just passing in the offset, but it might be slightly confusing to read in the vanilla RISCV model. If it helps we could rename the hook |
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Moving the read and add into the handler looks preferable. We need to document the hook anyway, and we could perhaps add an additional clarifying comment in the vanilla model. would |
…t to data_get_addr. This avoids a double register read in CHERI case.
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This will assist with implementing CHERI capability mode.