things compile, but can't correctly access yaml settings from Sail

Makefile

@@ -119,8 +119,8 @@ export LEM_DIR
 
 C_WARNINGS ?=
 #-Wall -Wextra -Wno-unused-label -Wno-unused-parameter -Wno-unused-but-set-variable -Wno-unused-function
-C_INCS = $(addprefix c_emulator/,riscv_prelude.h riscv_platform_impl.h riscv_platform.h riscv_softfloat.h)
-C_SRCS = $(addprefix c_emulator/,riscv_prelude.c riscv_platform_impl.c riscv_platform.c riscv_softfloat.c riscv_sim.c)
+C_INCS = $(addprefix c_emulator/,riscv_prelude.h riscv_platform_impl.h riscv_platform.h riscv_softfloat.h cfunc.h)
+C_SRCS = $(addprefix c_emulator/,riscv_prelude.c riscv_platform_impl.c riscv_platform.c riscv_softfloat.c riscv_sim.c cfunc.c)
 
 SOFTFLOAT_DIR    = c_emulator/SoftFloat-3e
 SOFTFLOAT_INCDIR = $(SOFTFLOAT_DIR)/source/include
@@ -134,9 +134,11 @@ GMP_FLAGS = $(shell pkg-config --cflags gmp)
 GMP_LIBS = $(shell pkg-config --libs gmp || echo -lgmp)
 ZLIB_FLAGS = $(shell pkg-config --cflags zlib)
 ZLIB_LIBS = $(shell pkg-config --libs zlib)
+FYAML_FLAGS =$(shell pkg-config --cflags libfyaml)
+FYAML_LIBS=$(shell pkg-config --libs libfyaml)
 
-C_FLAGS = -I $(SAIL_LIB_DIR) -I c_emulator $(GMP_FLAGS) $(ZLIB_FLAGS) $(SOFTFLOAT_FLAGS) -fcommon
-C_LIBS  = $(GMP_LIBS) $(ZLIB_LIBS) $(SOFTFLOAT_LIBS)
+C_FLAGS = -I $(SAIL_LIB_DIR) -I c_emulator $(GMP_FLAGS) $(ZLIB_FLAGS) $(SOFTFLOAT_FLAGS) $(FYAML_FLAGS) -fcommon
+C_LIBS  = $(GMP_LIBS) $(ZLIB_LIBS) $(SOFTFLOAT_LIBS) $(FYAML_LIBS)
 
 # The C simulator can be built to be linked against Spike for tandem-verification.
 # This needs the C bindings to Spike from https://github.com/SRI-CSL/l3riscv
@@ -275,7 +277,7 @@ rvfi_preserve_fns=-c_preserve rvfi_set_instr_packet \
 
 generated_definitions/c/riscv_rvfi_model_$(ARCH).c: $(SAIL_RVFI_SRCS) model/main.sail Makefile
 	mkdir -p generated_definitions/c
-	$(SAIL) $(rvfi_preserve_fns) $(SAIL_FLAGS) -O -Oconstant_fold -memo_z3 -c -c_include riscv_prelude.h -c_include riscv_platform.h -c_no_main $(SAIL_RVFI_SRCS) model/main.sail -o $(basename $@)
+	$(SAIL) $(rvfi_preserve_fns) $(SAIL_FLAGS) -O -Oconstant_fold -memo_z3 -c -c_include riscv_prelude.h -c_include riscv_platform.h -c_include cfunc.h -c_no_main $(SAIL_RVFI_SRCS) model/main.sail -o $(basename $@)
 	sed -i -e '/^[[:space:]]*$$/d' $@
 
 c_emulator/riscv_rvfi_$(ARCH): generated_definitions/c/riscv_rvfi_model_$(ARCH).c $(C_INCS) $(C_SRCS) $(SOFTFLOAT_LIBS) Makefile

c_emulator/riscv_platform_impl.h

@@ -5,7 +5,8 @@
 
 /* Settings of the platform implementation. */
 
-#define DEFAULT_RSTVEC     0x00001000
+// #define DEFAULT_RSTVEC     0x00001000
+#define DEFAULT_RSTVEC     cfunc_int("./rv32i_platform.yaml", "/reset/address")
 
 extern bool rv_enable_pmp;
 extern bool rv_enable_zfinx;

c_emulator/riscv_sim.c

@@ -1,3 +1,4 @@
+// vim: set tabstop=2 shiftwidth=2 expandtab
 #include <getopt.h>
 #include <stdio.h>
 #include <stdlib.h>
@@ -10,6 +11,7 @@
 #include <sys/socket.h>
 #include <netinet/ip.h>
 #include <fcntl.h>
+#include <libfyaml.h>
 
 #include "elf.h"
 #include "sail.h"
@@ -76,6 +78,16 @@ bool config_print_mem_access = true;
 bool config_print_platform = true;
 bool config_print_rvfi = false;
 
+/* RISC-V Config YAML configuration support */
+char                *rv_config_platform_file = NULL;
+int                 rv_config_platform_fd = 0;
+struct fy_document  *rv_config_fyd_platform = NULL;
+
+char                *rv_config_isa_file = NULL;
+int                 rv_config_isa_fd = 0;
+struct fy_document  *rv_config_fyd_isa      = NULL;
+
+
 void set_config_print(char *var, bool val) {
   if (var == NULL || strcmp("all", var) == 0) {
     config_print_instr = val;
@@ -130,6 +142,8 @@ static struct option options[] = {
   {"no-trace",                    optional_argument, 0, 'V'},
   {"inst-limit",                  required_argument, 0, 'l'},
   {"enable-zfinx",                no_argument,       0, 'x'},
+  {"platform-config",             required_argument, 0, 'y'},
+  {"isa-config",                  required_argument, 0, 'u'},
 #ifdef SAILCOV
   {"sailcov-file",                required_argument, 0, 'c'},
 #endif
@@ -234,6 +248,8 @@ char *process_args(int argc, char **argv)
                     "T:"
                     "g"
                     "h"
+                    "y:"
+                    "u:"
 #ifdef RVFI_DII
                     "r:"
 #endif
@@ -247,6 +263,37 @@ char *process_args(int argc, char **argv)
                          , options, NULL);
     if (c == -1) break;
     switch (c) {
+    case 'y': {
+      struct stat buffer;
+      rv_config_platform_file = optarg;
+      printf("RISC-V platform YAML file: %s\n", rv_config_platform_file);
+      if ( (stat(rv_config_platform_file, &buffer) == -1) ) {
+        fprintf(stderr, "RISC-V Config platform file, %s, does not exist.\n", rv_config_platform_file);
+        break;
+      }
+      rv_config_fyd_platform = fy_document_build_from_file(NULL, rv_config_platform_file);
+      if (!rv_config_fyd_platform) {
+        fprintf(stderr, "unable to build fast-yaml document from %s\n", rv_config_platform_file);
+        break;
+      }
+
+      break;
+      }
+    case 'u': {
+      struct stat buffer;
+      rv_config_isa_file = optarg;
+      printf("RISC-V platform YAML file: %s\n", rv_config_isa_file);
+      if ( (stat(rv_config_isa_file, &buffer) == -1) ) {
+        fprintf(stderr, "RISC-V Config ISA file, %s, does not exist.\n", rv_config_isa_file);
+      }
+      rv_config_fyd_isa = fy_document_build_from_file(NULL, rv_config_isa_file);
+      if (!rv_config_fyd_isa) {
+        fprintf(stderr, "unable to build fast-yaml document from %s\n", rv_config_isa_file);
+        break;
+      }
+
+      break;
+      }
     case 'a':
       report_arch();
       break;
@@ -470,29 +517,34 @@ void tick_spike()
 
 void init_sail_reset_vector(uint64_t entry)
 {
-#define RST_VEC_SIZE 8
-  uint32_t reset_vec[RST_VEC_SIZE] = {
-    0x297,                                      // auipc  t0,0x0
-    0x28593 + (RST_VEC_SIZE * 4 << 20),         // addi   a1, t0, &dtb
-    0xf1402573,                                 // csrr   a0, mhartid
-    is_32bit_model() ?
-      0x0182a283u :                             // lw     t0,24(t0)
-      0x0182b283u,                              // ld     t0,24(t0)
-    0x28067,                                    // jr     t0
-    0,
-    (uint32_t) (entry & 0xffffffff),
-    (uint32_t) (entry >> 32)
-  };
-
+// TODO: This code is commented out because we don't want the
+//  the Sail model setting up and executing any code.  BUT....
+//  the question is:  will the Sail model load the .elf file
+//  into the appropriate place in memory?
+//
+//#define RST_VEC_SIZE 8
+//  uint32_t reset_vec[RST_VEC_SIZE] = {
+//    0x297,                                      // auipc  t0,0x0
+//    0x28593 + (RST_VEC_SIZE * 4 << 20),         // addi   a1, t0, &dtb
+//    0xf1402573,                                 // csrr   a0, mhartid
+//    is_32bit_model() ?
+//      0x0182a283u :                             // lw     t0,24(t0)
+//      0x0182b283u,                              // ld     t0,24(t0)
+//    0x28067,                                    // jr     t0
+//    0,
+//    (uint32_t) (entry & 0xffffffff),
+//    (uint32_t) (entry >> 32)
+//  };
+//
   rv_rom_base = DEFAULT_RSTVEC;
   uint64_t addr = rv_rom_base;
-  for (int i = 0; i < sizeof(reset_vec); i++)
-    write_mem(addr++, (uint64_t)((char *)reset_vec)[i]);
-
-  if (dtb && dtb_len) {
-    for (size_t i = 0; i < dtb_len; i++)
-      write_mem(addr++, dtb[i]);
-  }
+//  for (int i = 0; i < sizeof(reset_vec); i++)
+//    write_mem(addr++, (uint64_t)((char *)reset_vec)[i]);
+//
+//  if (dtb && dtb_len) {
+//    for (size_t i = 0; i < dtb_len; i++)
+//      write_mem(addr++, dtb[i]);
+//  }
 
 #ifdef ENABLE_SPIKE
   if (dtb && dtb_len) {

cookbook/doc/TheRISCVSailCookbook_Main.adoc

@@ -1,6 +1,6 @@
 :doctype: book
 :sectids:
-The RISC-V Sail Programming Language: A Cookbook for the RISC-V ISA
+The RISCV Sail Golden Model: A Cookbook for the RISCV ISA
 ==============================================
 William C. McSpadden <bill@riscv.org>; Martin Berger <contact@martinfriedrichberger.net>
 :toc:
@@ -9,7 +9,6 @@ William C. McSpadden <[email protected]>; Martin Berger <contact@martinfriedrichber
 
 :showtitle:
 
-
 // Need some preamble to get TOC
 {empty}
 
@@ -52,16 +51,6 @@ The example should be short, standalone and easy to maintain.
 
 We would also ask that if you contribute a code example,  that you would maintain it.
 
-=== Syntax highlighting for Sail
-
-Syntax highlighting for several editors (emacs, vim, Visual Studio, etc)
-can be found at:
-
-https://github.com/rems-project/sail/tree/sail2/editors
-
-It is beyond the scope of this document to describe how to use
-the syntax highlighting for the various editors.
-
 == Sail installation
 
 TBD
@@ -116,3 +105,4 @@ Following are a set of FAQs that were generated via set of questions to the Sail
 
 include::./RISCV_model_FAQ.adoc[]
 
+

cookbook/functional_code_examples/platform_configuration/Makefile

@@ -43,7 +43,8 @@ RISCV			:= /opt/riscv${XLEN}
 CONFIG_BASE		:= 0x80000000
 MARCH          	:= -march=rv32imc -mabi=ilp32
 LD_FILE			:= ./riscv_test.ld
-RUN_TOOL		:= /home/billmc/riscv/sail-riscv.git/c_emulator/riscv_sim_RV32
+# TODO:  Need to extract the path to the run tool.  DO NOT HARDCODE THIS!!!!
+RUN_TOOL		:= /home/billmc/riscv/sail-riscv_br_billmcspadden-riscv.git/c_emulator/riscv_sim_RV32
 
 # USER MUST SET THESE TO A PROPER SETTING
 # --------------------------------------------------------------------------------------------
@@ -141,7 +142,7 @@ clean:
 
 
 run: ${TARGET}
-	${RUN_TOOL} ${TARGET} 2>&1 | tee ${OUT_FILE}
+	${RUN_TOOL} ${TARGET} -y rv32i_platform.yaml -u rv32i_isa.yaml 2>&1 | tee ${OUT_FILE}
 
 clean_all: clean
 

cookbook/functional_code_examples/platform_configuration/riscv_test.ld

@@ -28,11 +28,19 @@ SECTIONS
 
   /* text: test code section */
 /*. = 0x00000040; */
-/*. = 0x00001000; */
+  . = 0x00001000; 
+/*
   . = 0x80000000;
-  .text.init : { *(.text.init) }
+*/
+  .rotext.init : { *(.rotext.init) }
+
+  /* 
+  making the symbol, reset_vector, a global,  put the 
+  reset vector at 0x80000000
+  */
+  . = 0x80000000;
+  .text.begin . : { *(.text.begin) }
 
-  .text : { *(.text) }
 
   /* data segment */
 /*. = 0x00080000; */

cookbook/functional_code_examples/platform_configuration/rv32i_platform.yaml

@@ -1,7 +1,8 @@
 nmi:
   label: nmi_vector
 reset:
-  label: reset_vector
+# label: reset_vector
+  address: 0x1000
 mtime:
   implemented: True
   address: 0x20000

cookbook/functional_code_examples/platform_configuration/test.S

@@ -32,7 +32,7 @@
 //  Put this code in ROM.
 //  We jump to "reset_vector"
 //
-  .section ".text.init"
+  .section ".rotext.init"
   .globl _start
 _start:
   la    x5,   reset_vector
@@ -43,6 +43,8 @@ _start:
 // Initialization of the processor, starting with the 
 //  register file.
 //  Put this code in RAM.
+  .section ".text.begin"
+  .global reset_vector    // This pushed the symbol, reset_vector, to 0x80000000
 reset_vector:
   li    x1,       0
   li    x2,       0

model/main.sail

@@ -66,12 +66,18 @@
 /*  SUCH DAMAGE.                                                                         */
 /*=======================================================================================*/
 
+// TODO:  put the cfunc interface into a sail file and include it.
+val cfunc_int           = { c: "cfunc_int" }        : (string, string)  -> int
+
 function main () : unit -> unit = {
   // initialize extensions
   ext_init ();
 
+  let reset_address : int = cfunc_int( "./rv32i_platform.sail" , "/reset/address") ;
+
   // PC = __GetSlice_int(64, elf_entry(), 0);
   PC = sail_zero_extend(0x1000, sizeof(xlen));
+  // PC = sail_zero_extend(reset_address, sizeof(xlen));
   print_bits("PC = ", PC);
 
   try {